eeb2d80d50
Add functionality to read LPIT table, which provides: - Sysfs interface to read residency counters via /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us Here the count "low_power_idle_cpu_residency_us" shows the time spent by CPU package in low power state. This is read via MSR interface, which points to MSR for PKG C10. Here the count "low_power_idle_system_residency_us" show the count the system was in low power state. This is read via MMIO interface. This is mapped to SLP_S0 residency on modern Intel systems. This residency is achieved only when CPU is in PKG C10 and all functional blocks are in low power state. It is possible that none of the above counters present or anyone of the counter present or all counters present. For example: On my Kabylake system both of the above counters present. After suspend to idle these counts updated and prints: 6916179 6998564 This counter can be read by tools like turbostat to display. Or it can be used to debug, if modern systems are reaching desired low power state. - Provides an interface to read residency counter memory address This address can be used to get the base address of PMC memory mapped IO. This is utilized by intel_pmc_core driver to print more debug information. In addition, to avoid code duplication to read iomem, removed the read of iomem from acpi_os_read_memory() in osl.c and made a common function acpi_os_read_iomem(). This new function is used for reading iomem in in both osl.c and acpi_lpit.c. Link: http://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
26 lines
1.1 KiB
Plaintext
26 lines
1.1 KiB
Plaintext
To enumerate platform Low Power Idle states, Intel platforms are using
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“Low Power Idle Table” (LPIT). More details about this table can be
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downloaded from:
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http://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf
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Residencies for each low power state can be read via FFH
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(Function fixed hardware) or a memory mapped interface.
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On platforms supporting S0ix sleep states, there can be two types of
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residencies:
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- CPU PKG C10 (Read via FFH interface)
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- Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
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The following attributes are added dynamically to the cpuidle
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sysfs attribute group:
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/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
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/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
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The "low_power_idle_cpu_residency_us" attribute shows time spent
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by the CPU package in PKG C10
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The "low_power_idle_system_residency_us" attribute shows SLP_S0
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residency, or system time spent with the SLP_S0# signal asserted.
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This is the lowest possible system power state, achieved only when CPU is in
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PKG C10 and all functional blocks in PCH are in a low power state.
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