![Roland McGrath](/assets/img/avatar_default.png)
This removes a bunch of dead code that is no longer needed now that the user_regset interfaces are being used for all these jobs. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
480 lines
12 KiB
C
480 lines
12 KiB
C
/*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/regset.h>
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#include <asm/processor.h>
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#include <asm/i387.h>
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#include <asm/math_emu.h>
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#include <asm/sigcontext.h>
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#include <asm/user.h>
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#include <asm/ptrace.h>
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#include <asm/uaccess.h>
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#ifdef CONFIG_X86_64
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#include <asm/sigcontext32.h>
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#include <asm/user32.h>
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#else
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#define save_i387_ia32 save_i387
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#define restore_i387_ia32 restore_i387
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#define _fpstate_ia32 _fpstate
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#define user_i387_ia32_struct user_i387_struct
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#define user32_fxsr_struct user_fxsr_struct
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#endif
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#ifdef CONFIG_MATH_EMULATION
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#define HAVE_HWFP (boot_cpu_data.hard_math)
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#else
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#define HAVE_HWFP 1
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#endif
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unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
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void mxcsr_feature_mask_init(void)
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{
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unsigned long mask = 0;
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clts();
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if (cpu_has_fxsr) {
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memset(¤t->thread.i387.fxsave, 0,
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sizeof(struct i387_fxsave_struct));
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asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave));
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mask = current->thread.i387.fxsave.mxcsr_mask;
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if (mask == 0)
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mask = 0x0000ffbf;
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}
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mxcsr_feature_mask &= mask;
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stts();
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}
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#ifdef CONFIG_X86_64
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/*
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* Called at bootup to set up the initial FPU state that is later cloned
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* into all processes.
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*/
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void __cpuinit fpu_init(void)
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{
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unsigned long oldcr0 = read_cr0();
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extern void __bad_fxsave_alignment(void);
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if (offsetof(struct task_struct, thread.i387.fxsave) & 15)
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__bad_fxsave_alignment();
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set_in_cr4(X86_CR4_OSFXSR);
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set_in_cr4(X86_CR4_OSXMMEXCPT);
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write_cr0(oldcr0 & ~((1UL<<3)|(1UL<<2))); /* clear TS and EM */
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mxcsr_feature_mask_init();
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/* clean state in init */
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current_thread_info()->status = 0;
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clear_used_math();
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}
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#endif /* CONFIG_X86_64 */
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/*
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* The _current_ task is using the FPU for the first time
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* so initialize it and set the mxcsr to its default
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* value at reset if we support XMM instructions and then
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* remeber the current task has used the FPU.
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*/
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void init_fpu(struct task_struct *tsk)
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{
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if (tsk_used_math(tsk)) {
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if (tsk == current)
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unlazy_fpu(tsk);
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return;
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}
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if (cpu_has_fxsr) {
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memset(&tsk->thread.i387.fxsave, 0,
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sizeof(struct i387_fxsave_struct));
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tsk->thread.i387.fxsave.cwd = 0x37f;
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if (cpu_has_xmm)
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tsk->thread.i387.fxsave.mxcsr = MXCSR_DEFAULT;
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} else {
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memset(&tsk->thread.i387.fsave, 0,
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sizeof(struct i387_fsave_struct));
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tsk->thread.i387.fsave.cwd = 0xffff037fu;
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tsk->thread.i387.fsave.swd = 0xffff0000u;
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tsk->thread.i387.fsave.twd = 0xffffffffu;
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tsk->thread.i387.fsave.fos = 0xffff0000u;
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}
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/*
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* Only the device not available exception or ptrace can call init_fpu.
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*/
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set_stopped_child_used_math(tsk);
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}
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int fpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return tsk_used_math(target) ? regset->n : 0;
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}
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int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
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}
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int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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if (!cpu_has_fxsr)
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return -ENODEV;
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unlazy_fpu(target);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.i387.fxsave, 0, -1);
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}
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int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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if (!cpu_has_fxsr)
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return -ENODEV;
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unlazy_fpu(target);
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set_stopped_child_used_math(target);
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.i387.fxsave, 0, -1);
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/*
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* mxcsr reserved bits must be masked to zero for security reasons.
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*/
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target->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
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return ret;
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}
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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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/*
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* FPU tag word conversions.
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*/
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static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
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{
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unsigned int tmp; /* to avoid 16 bit prefixes in the code */
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/* Transform each pair of bits into 01 (valid) or 00 (empty) */
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tmp = ~twd;
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tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
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/* and move the valid bits to the lower byte. */
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tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
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tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
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tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
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return tmp;
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}
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#define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
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#define FP_EXP_TAG_VALID 0
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#define FP_EXP_TAG_ZERO 1
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#define FP_EXP_TAG_SPECIAL 2
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#define FP_EXP_TAG_EMPTY 3
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static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
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{
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struct _fpxreg *st;
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u32 tos = (fxsave->swd >> 11) & 7;
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u32 twd = (unsigned long) fxsave->twd;
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u32 tag;
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u32 ret = 0xffff0000u;
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int i;
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for (i = 0; i < 8; i++, twd >>= 1) {
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if (twd & 0x1) {
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st = FPREG_ADDR(fxsave, (i - tos) & 7);
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switch (st->exponent & 0x7fff) {
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case 0x7fff:
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tag = FP_EXP_TAG_SPECIAL;
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break;
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case 0x0000:
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if (!st->significand[0] &&
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!st->significand[1] &&
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!st->significand[2] &&
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!st->significand[3])
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tag = FP_EXP_TAG_ZERO;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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default:
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if (st->significand[3] & 0x8000)
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tag = FP_EXP_TAG_VALID;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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}
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} else {
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tag = FP_EXP_TAG_EMPTY;
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}
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ret |= tag << (2 * i);
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}
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return ret;
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}
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/*
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* FXSR floating point environment conversions.
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*/
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static void convert_from_fxsr(struct user_i387_ia32_struct *env,
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struct task_struct *tsk)
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{
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struct i387_fxsave_struct *fxsave = &tsk->thread.i387.fxsave;
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struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
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struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
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int i;
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env->cwd = fxsave->cwd | 0xffff0000u;
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env->swd = fxsave->swd | 0xffff0000u;
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env->twd = twd_fxsr_to_i387(fxsave);
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#ifdef CONFIG_X86_64
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env->fip = fxsave->rip;
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env->foo = fxsave->rdp;
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if (tsk == current) {
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/*
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* should be actually ds/cs at fpu exception time, but
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* that information is not available in 64bit mode.
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*/
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asm("mov %%ds,%0" : "=r" (env->fos));
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asm("mov %%cs,%0" : "=r" (env->fcs));
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} else {
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struct pt_regs *regs = task_pt_regs(tsk);
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env->fos = 0xffff0000 | tsk->thread.ds;
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env->fcs = regs->cs;
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}
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#else
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env->fip = fxsave->fip;
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env->fcs = fxsave->fcs;
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env->foo = fxsave->foo;
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env->fos = fxsave->fos;
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#endif
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for (i = 0; i < 8; ++i)
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memcpy(&to[i], &from[i], sizeof(to[0]));
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}
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static void convert_to_fxsr(struct task_struct *tsk,
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const struct user_i387_ia32_struct *env)
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{
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struct i387_fxsave_struct *fxsave = &tsk->thread.i387.fxsave;
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struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
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struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
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int i;
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fxsave->cwd = env->cwd;
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fxsave->swd = env->swd;
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fxsave->twd = twd_i387_to_fxsr(env->twd);
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fxsave->fop = (u16) ((u32) env->fcs >> 16);
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#ifdef CONFIG_X86_64
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fxsave->rip = env->fip;
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fxsave->rdp = env->foo;
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/* cs and ds ignored */
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#else
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fxsave->fip = env->fip;
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fxsave->fcs = (env->fcs & 0xffff);
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fxsave->foo = env->foo;
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fxsave->fos = env->fos;
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#endif
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for (i = 0; i < 8; ++i)
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memcpy(&to[i], &from[i], sizeof(from[0]));
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}
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int fpregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct user_i387_ia32_struct env;
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if (!HAVE_HWFP)
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return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
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unlazy_fpu(target);
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if (!cpu_has_fxsr)
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.i387.fsave, 0, -1);
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if (kbuf && pos == 0 && count == sizeof(env)) {
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convert_from_fxsr(kbuf, target);
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return 0;
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}
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convert_from_fxsr(&env, target);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
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}
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int fpregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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struct user_i387_ia32_struct env;
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int ret;
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if (!HAVE_HWFP)
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return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
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unlazy_fpu(target);
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set_stopped_child_used_math(target);
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if (!cpu_has_fxsr)
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return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.i387.fsave, 0, -1);
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if (pos > 0 || count < sizeof(env))
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convert_from_fxsr(&env, target);
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
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if (!ret)
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convert_to_fxsr(target, &env);
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return ret;
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}
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/*
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* Signal frame handlers.
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*/
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static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
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{
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struct task_struct *tsk = current;
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unlazy_fpu(tsk);
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tsk->thread.i387.fsave.status = tsk->thread.i387.fsave.swd;
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if (__copy_to_user(buf, &tsk->thread.i387.fsave,
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sizeof(struct i387_fsave_struct)))
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return -1;
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return 1;
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}
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static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
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{
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struct task_struct *tsk = current;
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struct user_i387_ia32_struct env;
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int err = 0;
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unlazy_fpu(tsk);
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convert_from_fxsr(&env, tsk);
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if (__copy_to_user(buf, &env, sizeof(env)))
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return -1;
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err |= __put_user(tsk->thread.i387.fxsave.swd, &buf->status);
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err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
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if (err)
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return -1;
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if (__copy_to_user(&buf->_fxsr_env[0], &tsk->thread.i387.fxsave,
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sizeof(struct i387_fxsave_struct)))
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return -1;
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return 1;
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}
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int save_i387_ia32(struct _fpstate_ia32 __user *buf)
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{
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if (!used_math())
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return 0;
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/* This will cause a "finit" to be triggered by the next
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* attempted FPU operation by the 'current' process.
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*/
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clear_used_math();
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if (HAVE_HWFP) {
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if (cpu_has_fxsr) {
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return save_i387_fxsave(buf);
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} else {
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return save_i387_fsave(buf);
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}
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} else {
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return fpregs_soft_get(current, NULL,
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0, sizeof(struct user_i387_ia32_struct),
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NULL, buf) ? -1 : 1;
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}
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}
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static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
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{
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struct task_struct *tsk = current;
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clear_fpu(tsk);
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return __copy_from_user(&tsk->thread.i387.fsave, buf,
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sizeof(struct i387_fsave_struct));
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}
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static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
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{
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int err;
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struct task_struct *tsk = current;
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struct user_i387_ia32_struct env;
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clear_fpu(tsk);
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err = __copy_from_user(&tsk->thread.i387.fxsave, &buf->_fxsr_env[0],
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sizeof(struct i387_fxsave_struct));
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/* mxcsr reserved bits must be masked to zero for security reasons */
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tsk->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
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if (err || __copy_from_user(&env, buf, sizeof(env)))
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return 1;
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convert_to_fxsr(tsk, &env);
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return 0;
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}
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int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
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{
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int err;
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if (HAVE_HWFP) {
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if (cpu_has_fxsr) {
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err = restore_i387_fxsave(buf);
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} else {
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err = restore_i387_fsave(buf);
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}
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} else {
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err = fpregs_soft_set(current, NULL,
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0, sizeof(struct user_i387_ia32_struct),
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NULL, buf) != 0;
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}
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set_used_math();
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return err;
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}
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/*
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* FPU state for core dumps.
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* This is only used for a.out dumps now.
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* It is declared generically using elf_fpregset_t (which is
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* struct user_i387_struct) but is in fact only used for 32-bit
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* dumps, so on 64-bit it is really struct user_i387_ia32_struct.
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*/
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int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
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{
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int fpvalid;
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struct task_struct *tsk = current;
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fpvalid = !!used_math();
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if (fpvalid)
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fpvalid = !fpregs_get(tsk, NULL,
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0, sizeof(struct user_i387_ia32_struct),
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fpu, NULL);
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return fpvalid;
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}
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EXPORT_SYMBOL(dump_fpu);
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#endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
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