![Chris Wilson](/assets/img/avatar_default.png)
It is recommended that we use the Video BIOS tables that were copied into the OpRegion during POST when initialising the driver. This saves us from having to furtle around inside the ROM ourselves and possibly allows the vBIOS to adjust the tables prior to initialisation. On some systems, such as the Samsung N210, there is no accessible VBIOS and the only means of finding the VBT is through the OpRegion. v2: Rearrange the code so that ASLE is enabled along with ACPI v3: Enable OpRegion parsing even without ACPI Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Garrett <mjg@redhat.com>
894 lines
25 KiB
C
894 lines
25 KiB
C
/*
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* Copyright © 2008 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Keith Packard <keithp@keithp.com>
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*
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*/
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#include <linux/seq_file.h>
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#include <linux/debugfs.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "drm.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#define DRM_I915_RING_DEBUG 1
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#if defined(CONFIG_DEBUG_FS)
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#define ACTIVE_LIST 1
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#define FLUSHING_LIST 2
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#define INACTIVE_LIST 3
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static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
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{
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if (obj_priv->user_pin_count > 0)
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return "P";
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else if (obj_priv->pin_count > 0)
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return "p";
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else
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return " ";
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}
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static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
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{
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switch (obj_priv->tiling_mode) {
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default:
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case I915_TILING_NONE: return " ";
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case I915_TILING_X: return "X";
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case I915_TILING_Y: return "Y";
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}
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}
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static int i915_gem_object_list_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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uintptr_t list = (uintptr_t) node->info_ent->data;
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struct list_head *head;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *obj_priv;
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spinlock_t *lock = NULL;
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switch (list) {
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case ACTIVE_LIST:
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seq_printf(m, "Active:\n");
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lock = &dev_priv->mm.active_list_lock;
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head = &dev_priv->render_ring.active_list;
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break;
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case INACTIVE_LIST:
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seq_printf(m, "Inactive:\n");
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head = &dev_priv->mm.inactive_list;
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break;
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case FLUSHING_LIST:
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seq_printf(m, "Flushing:\n");
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head = &dev_priv->mm.flushing_list;
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break;
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default:
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DRM_INFO("Ooops, unexpected list\n");
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return 0;
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}
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if (lock)
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spin_lock(lock);
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list_for_each_entry(obj_priv, head, list)
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{
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seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
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&obj_priv->base,
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get_pin_flag(obj_priv),
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obj_priv->base.size,
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obj_priv->base.read_domains,
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obj_priv->base.write_domain,
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obj_priv->last_rendering_seqno,
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obj_priv->dirty ? " dirty" : "",
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obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
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if (obj_priv->base.name)
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seq_printf(m, " (name: %d)", obj_priv->base.name);
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if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
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seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
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if (obj_priv->gtt_space != NULL)
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seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset);
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seq_printf(m, "\n");
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}
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if (lock)
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spin_unlock(lock);
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return 0;
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}
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static int i915_gem_pageflip_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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unsigned long flags;
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struct intel_crtc *crtc;
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
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const char *pipe = crtc->pipe ? "B" : "A";
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const char *plane = crtc->plane ? "B" : "A";
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struct intel_unpin_work *work;
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spin_lock_irqsave(&dev->event_lock, flags);
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work = crtc->unpin_work;
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if (work == NULL) {
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seq_printf(m, "No flip due on pipe %s (plane %s)\n",
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pipe, plane);
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} else {
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if (!work->pending) {
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seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
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pipe, plane);
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} else {
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seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
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pipe, plane);
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}
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if (work->enable_stall_check)
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seq_printf(m, "Stall check enabled, ");
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else
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seq_printf(m, "Stall check waiting for page flip ioctl, ");
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seq_printf(m, "%d prepares\n", work->pending);
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if (work->old_fb_obj) {
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struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
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if(obj_priv)
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seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
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}
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if (work->pending_flip_obj) {
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struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
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if(obj_priv)
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seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
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}
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}
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spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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return 0;
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}
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static int i915_gem_request_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_gem_request *gem_request;
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seq_printf(m, "Request:\n");
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list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
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list) {
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seq_printf(m, " %d @ %d\n",
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gem_request->seqno,
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(int) (jiffies - gem_request->emitted_jiffies));
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}
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return 0;
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}
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static int i915_gem_seqno_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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if (dev_priv->render_ring.status_page.page_addr != NULL) {
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seq_printf(m, "Current sequence: %d\n",
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i915_get_gem_seqno(dev, &dev_priv->render_ring));
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} else {
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seq_printf(m, "Current sequence: hws uninitialized\n");
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}
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seq_printf(m, "Waiter sequence: %d\n",
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dev_priv->mm.waiting_gem_seqno);
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seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
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return 0;
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}
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static int i915_interrupt_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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if (!HAS_PCH_SPLIT(dev)) {
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seq_printf(m, "Interrupt enable: %08x\n",
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I915_READ(IER));
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seq_printf(m, "Interrupt identity: %08x\n",
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I915_READ(IIR));
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seq_printf(m, "Interrupt mask: %08x\n",
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I915_READ(IMR));
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seq_printf(m, "Pipe A stat: %08x\n",
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I915_READ(PIPEASTAT));
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seq_printf(m, "Pipe B stat: %08x\n",
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I915_READ(PIPEBSTAT));
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} else {
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seq_printf(m, "North Display Interrupt enable: %08x\n",
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I915_READ(DEIER));
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seq_printf(m, "North Display Interrupt identity: %08x\n",
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I915_READ(DEIIR));
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seq_printf(m, "North Display Interrupt mask: %08x\n",
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I915_READ(DEIMR));
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seq_printf(m, "South Display Interrupt enable: %08x\n",
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I915_READ(SDEIER));
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seq_printf(m, "South Display Interrupt identity: %08x\n",
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I915_READ(SDEIIR));
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seq_printf(m, "South Display Interrupt mask: %08x\n",
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I915_READ(SDEIMR));
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seq_printf(m, "Graphics Interrupt enable: %08x\n",
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I915_READ(GTIER));
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seq_printf(m, "Graphics Interrupt identity: %08x\n",
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I915_READ(GTIIR));
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seq_printf(m, "Graphics Interrupt mask: %08x\n",
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I915_READ(GTIMR));
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}
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seq_printf(m, "Interrupts received: %d\n",
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atomic_read(&dev_priv->irq_received));
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if (dev_priv->render_ring.status_page.page_addr != NULL) {
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seq_printf(m, "Current sequence: %d\n",
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i915_get_gem_seqno(dev, &dev_priv->render_ring));
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} else {
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seq_printf(m, "Current sequence: hws uninitialized\n");
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}
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seq_printf(m, "Waiter sequence: %d\n",
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dev_priv->mm.waiting_gem_seqno);
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seq_printf(m, "IRQ sequence: %d\n",
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dev_priv->mm.irq_gem_seqno);
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return 0;
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}
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static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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int i;
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seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
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seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
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for (i = 0; i < dev_priv->num_fence_regs; i++) {
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struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
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if (obj == NULL) {
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seq_printf(m, "Fenced object[%2d] = unused\n", i);
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} else {
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struct drm_i915_gem_object *obj_priv;
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obj_priv = to_intel_bo(obj);
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seq_printf(m, "Fenced object[%2d] = %p: %s "
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"%08x %08zx %08x %s %08x %08x %d",
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i, obj, get_pin_flag(obj_priv),
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obj_priv->gtt_offset,
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obj->size, obj_priv->stride,
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get_tiling_flag(obj_priv),
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obj->read_domains, obj->write_domain,
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obj_priv->last_rendering_seqno);
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if (obj->name)
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seq_printf(m, " (name: %d)", obj->name);
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seq_printf(m, "\n");
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}
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}
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return 0;
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}
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static int i915_hws_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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int i;
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volatile u32 *hws;
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hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
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if (hws == NULL)
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return 0;
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for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
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seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
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i * 4,
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hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
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}
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return 0;
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}
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static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
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{
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int page, i;
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uint32_t *mem;
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for (page = 0; page < page_count; page++) {
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mem = kmap_atomic(pages[page], KM_USER0);
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for (i = 0; i < PAGE_SIZE; i += 4)
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seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
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kunmap_atomic(mem, KM_USER0);
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}
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}
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static int i915_batchbuffer_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_gem_object *obj;
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struct drm_i915_gem_object *obj_priv;
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int ret;
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spin_lock(&dev_priv->mm.active_list_lock);
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list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list,
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list) {
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obj = &obj_priv->base;
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if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
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ret = i915_gem_object_get_pages(obj, 0);
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if (ret) {
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DRM_ERROR("Failed to get pages: %d\n", ret);
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spin_unlock(&dev_priv->mm.active_list_lock);
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return ret;
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}
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seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
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i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
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i915_gem_object_put_pages(obj);
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}
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}
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spin_unlock(&dev_priv->mm.active_list_lock);
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return 0;
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}
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static int i915_ringbuffer_data(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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u8 *virt;
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uint32_t *ptr, off;
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if (!dev_priv->render_ring.gem_object) {
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seq_printf(m, "No ringbuffer setup\n");
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return 0;
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}
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virt = dev_priv->render_ring.virtual_start;
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for (off = 0; off < dev_priv->render_ring.size; off += 4) {
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ptr = (uint32_t *)(virt + off);
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seq_printf(m, "%08x : %08x\n", off, *ptr);
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}
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return 0;
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}
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static int i915_ringbuffer_info(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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unsigned int head, tail;
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head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
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tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
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seq_printf(m, "RingHead : %08x\n", head);
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seq_printf(m, "RingTail : %08x\n", tail);
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seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
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seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
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return 0;
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}
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static const char *pin_flag(int pinned)
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{
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if (pinned > 0)
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return " P";
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else if (pinned < 0)
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return " p";
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else
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return "";
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}
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static const char *tiling_flag(int tiling)
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{
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switch (tiling) {
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default:
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case I915_TILING_NONE: return "";
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case I915_TILING_X: return " X";
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case I915_TILING_Y: return " Y";
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}
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}
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static const char *dirty_flag(int dirty)
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{
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return dirty ? " dirty" : "";
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}
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static const char *purgeable_flag(int purgeable)
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{
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return purgeable ? " purgeable" : "";
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}
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static int i915_error_state(struct seq_file *m, void *unused)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_error_state *error;
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unsigned long flags;
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int i, page, offset, elt;
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spin_lock_irqsave(&dev_priv->error_lock, flags);
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if (!dev_priv->first_error) {
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seq_printf(m, "no error state collected\n");
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goto out;
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}
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error = dev_priv->first_error;
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seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
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error->time.tv_usec);
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seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
|
|
seq_printf(m, "EIR: 0x%08x\n", error->eir);
|
|
seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
|
|
seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
|
|
seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
|
|
seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
|
|
seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
|
|
seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
|
|
if (IS_I965G(dev)) {
|
|
seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
|
|
seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
|
|
}
|
|
seq_printf(m, "seqno: 0x%08x\n", error->seqno);
|
|
|
|
if (error->active_bo_count) {
|
|
seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
|
|
|
|
for (i = 0; i < error->active_bo_count; i++) {
|
|
seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
|
|
error->active_bo[i].gtt_offset,
|
|
error->active_bo[i].size,
|
|
error->active_bo[i].read_domains,
|
|
error->active_bo[i].write_domain,
|
|
error->active_bo[i].seqno,
|
|
pin_flag(error->active_bo[i].pinned),
|
|
tiling_flag(error->active_bo[i].tiling),
|
|
dirty_flag(error->active_bo[i].dirty),
|
|
purgeable_flag(error->active_bo[i].purgeable));
|
|
|
|
if (error->active_bo[i].name)
|
|
seq_printf(m, " (name: %d)", error->active_bo[i].name);
|
|
if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
|
|
seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
|
|
|
|
seq_printf(m, "\n");
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
|
|
if (error->batchbuffer[i]) {
|
|
struct drm_i915_error_object *obj = error->batchbuffer[i];
|
|
|
|
seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
|
|
offset = 0;
|
|
for (page = 0; page < obj->page_count; page++) {
|
|
for (elt = 0; elt < PAGE_SIZE/4; elt++) {
|
|
seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
|
|
offset += 4;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
if (error->ringbuffer) {
|
|
struct drm_i915_error_object *obj = error->ringbuffer;
|
|
|
|
seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
|
|
offset = 0;
|
|
for (page = 0; page < obj->page_count; page++) {
|
|
for (elt = 0; elt < PAGE_SIZE/4; elt++) {
|
|
seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
|
|
offset += 4;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (error->overlay)
|
|
intel_overlay_print_error_state(m, error->overlay);
|
|
|
|
out:
|
|
spin_unlock_irqrestore(&dev_priv->error_lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_rstdby_delays(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
u16 crstanddelay = I915_READ16(CRSTANDVID);
|
|
|
|
seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_cur_delayinfo(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
u16 rgvswctl = I915_READ16(MEMSWCTL);
|
|
u16 rgvstat = I915_READ16(MEMSTAT_ILK);
|
|
|
|
seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
|
|
seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
|
|
seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
|
|
MEMSTAT_VID_SHIFT);
|
|
seq_printf(m, "Current P-state: %d\n",
|
|
(rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_delayfreq_table(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
u32 delayfreq;
|
|
int i;
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
|
|
seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
|
|
(delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline int MAP_TO_MV(int map)
|
|
{
|
|
return 1250 - (map * 25);
|
|
}
|
|
|
|
static int i915_inttoext_table(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
u32 inttoext;
|
|
int i;
|
|
|
|
for (i = 1; i <= 32; i++) {
|
|
inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
|
|
seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_drpc_info(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
u32 rgvmodectl = I915_READ(MEMMODECTL);
|
|
u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
|
|
u16 crstandvid = I915_READ16(CRSTANDVID);
|
|
|
|
seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
|
|
"yes" : "no");
|
|
seq_printf(m, "Boost freq: %d\n",
|
|
(rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
|
|
MEMMODE_BOOST_FREQ_SHIFT);
|
|
seq_printf(m, "HW control enabled: %s\n",
|
|
rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
|
|
seq_printf(m, "SW control enabled: %s\n",
|
|
rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
|
|
seq_printf(m, "Gated voltage change: %s\n",
|
|
rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
|
|
seq_printf(m, "Starting frequency: P%d\n",
|
|
(rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
|
|
seq_printf(m, "Max P-state: P%d\n",
|
|
(rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
|
|
seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
|
|
seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
|
|
seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
|
|
seq_printf(m, "Render standby enabled: %s\n",
|
|
(rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_fbc_status(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
if (!I915_HAS_FBC(dev)) {
|
|
seq_printf(m, "FBC unsupported on this chipset\n");
|
|
return 0;
|
|
}
|
|
|
|
if (intel_fbc_enabled(dev)) {
|
|
seq_printf(m, "FBC enabled\n");
|
|
} else {
|
|
seq_printf(m, "FBC disabled: ");
|
|
switch (dev_priv->no_fbc_reason) {
|
|
case FBC_STOLEN_TOO_SMALL:
|
|
seq_printf(m, "not enough stolen memory");
|
|
break;
|
|
case FBC_UNSUPPORTED_MODE:
|
|
seq_printf(m, "mode not supported");
|
|
break;
|
|
case FBC_MODE_TOO_LARGE:
|
|
seq_printf(m, "mode too large");
|
|
break;
|
|
case FBC_BAD_PLANE:
|
|
seq_printf(m, "FBC unsupported on plane");
|
|
break;
|
|
case FBC_NOT_TILED:
|
|
seq_printf(m, "scanout buffer not tiled");
|
|
break;
|
|
case FBC_MULTIPLE_PIPES:
|
|
seq_printf(m, "multiple pipes are enabled");
|
|
break;
|
|
default:
|
|
seq_printf(m, "unknown reason");
|
|
}
|
|
seq_printf(m, "\n");
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int i915_sr_status(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
bool sr_enabled = false;
|
|
|
|
if (IS_I965GM(dev) || IS_I945G(dev) || IS_I945GM(dev))
|
|
sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
|
|
else if (IS_I915GM(dev))
|
|
sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
|
|
else if (IS_PINEVIEW(dev))
|
|
sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
|
|
|
|
seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :
|
|
"disabled");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_emon_status(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
unsigned long temp, chipset, gfx;
|
|
|
|
temp = i915_mch_val(dev_priv);
|
|
chipset = i915_chipset_val(dev_priv);
|
|
gfx = i915_gfx_val(dev_priv);
|
|
|
|
seq_printf(m, "GMCH temp: %ld\n", temp);
|
|
seq_printf(m, "Chipset power: %ld\n", chipset);
|
|
seq_printf(m, "GFX power: %ld\n", gfx);
|
|
seq_printf(m, "Total power: %ld\n", chipset + gfx);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_gfxec(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_opregion(struct seq_file *m, void *unused)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
struct intel_opregion *opregion = &dev_priv->opregion;
|
|
int ret;
|
|
|
|
ret = mutex_lock_interruptible(&dev->struct_mutex);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (opregion->header)
|
|
seq_write(m, opregion->header, OPREGION_SIZE);
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
i915_wedged_open(struct inode *inode,
|
|
struct file *filp)
|
|
{
|
|
filp->private_data = inode->i_private;
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t
|
|
i915_wedged_read(struct file *filp,
|
|
char __user *ubuf,
|
|
size_t max,
|
|
loff_t *ppos)
|
|
{
|
|
struct drm_device *dev = filp->private_data;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
char buf[80];
|
|
int len;
|
|
|
|
len = snprintf(buf, sizeof (buf),
|
|
"wedged : %d\n",
|
|
atomic_read(&dev_priv->mm.wedged));
|
|
|
|
return simple_read_from_buffer(ubuf, max, ppos, buf, len);
|
|
}
|
|
|
|
static ssize_t
|
|
i915_wedged_write(struct file *filp,
|
|
const char __user *ubuf,
|
|
size_t cnt,
|
|
loff_t *ppos)
|
|
{
|
|
struct drm_device *dev = filp->private_data;
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
char buf[20];
|
|
int val = 1;
|
|
|
|
if (cnt > 0) {
|
|
if (cnt > sizeof (buf) - 1)
|
|
return -EINVAL;
|
|
|
|
if (copy_from_user(buf, ubuf, cnt))
|
|
return -EFAULT;
|
|
buf[cnt] = 0;
|
|
|
|
val = simple_strtoul(buf, NULL, 0);
|
|
}
|
|
|
|
DRM_INFO("Manually setting wedged to %d\n", val);
|
|
|
|
atomic_set(&dev_priv->mm.wedged, val);
|
|
if (val) {
|
|
DRM_WAKEUP(&dev_priv->irq_queue);
|
|
queue_work(dev_priv->wq, &dev_priv->error_work);
|
|
}
|
|
|
|
return cnt;
|
|
}
|
|
|
|
static const struct file_operations i915_wedged_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = i915_wedged_open,
|
|
.read = i915_wedged_read,
|
|
.write = i915_wedged_write,
|
|
};
|
|
|
|
/* As the drm_debugfs_init() routines are called before dev->dev_private is
|
|
* allocated we need to hook into the minor for release. */
|
|
static int
|
|
drm_add_fake_info_node(struct drm_minor *minor,
|
|
struct dentry *ent,
|
|
const void *key)
|
|
{
|
|
struct drm_info_node *node;
|
|
|
|
node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
|
|
if (node == NULL) {
|
|
debugfs_remove(ent);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
node->minor = minor;
|
|
node->dent = ent;
|
|
node->info_ent = (void *) key;
|
|
list_add(&node->list, &minor->debugfs_nodes.list);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
|
|
{
|
|
struct drm_device *dev = minor->dev;
|
|
struct dentry *ent;
|
|
|
|
ent = debugfs_create_file("i915_wedged",
|
|
S_IRUGO | S_IWUSR,
|
|
root, dev,
|
|
&i915_wedged_fops);
|
|
if (IS_ERR(ent))
|
|
return PTR_ERR(ent);
|
|
|
|
return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
|
|
}
|
|
|
|
static struct drm_info_list i915_debugfs_list[] = {
|
|
{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
|
|
{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
|
|
{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
|
|
{"i915_gem_pageflip", i915_gem_pageflip_info, 0},
|
|
{"i915_gem_request", i915_gem_request_info, 0},
|
|
{"i915_gem_seqno", i915_gem_seqno_info, 0},
|
|
{"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
|
|
{"i915_gem_interrupt", i915_interrupt_info, 0},
|
|
{"i915_gem_hws", i915_hws_info, 0},
|
|
{"i915_ringbuffer_data", i915_ringbuffer_data, 0},
|
|
{"i915_ringbuffer_info", i915_ringbuffer_info, 0},
|
|
{"i915_batchbuffers", i915_batchbuffer_info, 0},
|
|
{"i915_error_state", i915_error_state, 0},
|
|
{"i915_rstdby_delays", i915_rstdby_delays, 0},
|
|
{"i915_cur_delayinfo", i915_cur_delayinfo, 0},
|
|
{"i915_delayfreq_table", i915_delayfreq_table, 0},
|
|
{"i915_inttoext_table", i915_inttoext_table, 0},
|
|
{"i915_drpc_info", i915_drpc_info, 0},
|
|
{"i915_emon_status", i915_emon_status, 0},
|
|
{"i915_gfxec", i915_gfxec, 0},
|
|
{"i915_fbc_status", i915_fbc_status, 0},
|
|
{"i915_sr_status", i915_sr_status, 0},
|
|
{"i915_opregion", i915_opregion, 0},
|
|
};
|
|
#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
|
|
|
|
int i915_debugfs_init(struct drm_minor *minor)
|
|
{
|
|
int ret;
|
|
|
|
ret = i915_wedged_create(minor->debugfs_root, minor);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return drm_debugfs_create_files(i915_debugfs_list,
|
|
I915_DEBUGFS_ENTRIES,
|
|
minor->debugfs_root, minor);
|
|
}
|
|
|
|
void i915_debugfs_cleanup(struct drm_minor *minor)
|
|
{
|
|
drm_debugfs_remove_files(i915_debugfs_list,
|
|
I915_DEBUGFS_ENTRIES, minor);
|
|
drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
|
|
1, minor);
|
|
}
|
|
|
|
#endif /* CONFIG_DEBUG_FS */
|