e00c5498a2
1. PCI and reset are factored out into pq2.c. I renamed them from m82xx to pq2 because they won't work on the Integrated Host Processor line of 82xx chips (i.e. 8240, 8245, and such). 2. The PCI PIC, which is nominally board-specific, is used on multiple boards, and thus is used into pq2ads-pci-pic.c. 3. The new CPM binding is used. 4. General cleanup. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
58 lines
2 KiB
C
58 lines
2 KiB
C
/*
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* PQ2/mpc8260 board-specific stuff
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*
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* A collection of structures, addresses, and values associated with
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* the Freescale MPC8260ADS/MPC8266ADS-PCI boards.
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* Copied from the RPX-Classic and SBS8260 stuff.
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*
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* Author: Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* Originally written by Dan Malek for Motorola MPC8260 family
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*
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* Copyright (c) 2001 Dan Malek <dan@embeddedalley.com>
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* Copyright (c) 2006 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifdef __KERNEL__
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#ifndef __MACH_ADS8260_DEFS
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#define __MACH_ADS8260_DEFS
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#include <linux/seq_file.h>
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/* Backword-compatibility stuff for the drivers */
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#define CPM_MAP_ADDR ((uint)0xf0000000)
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#define CPM_IRQ_OFFSET 0
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/* The ADS8260 has 16, 32-bit wide control/status registers, accessed
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* only on word boundaries.
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* Not all are used (yet), or are interesting to us (yet).
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*/
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/* Things of interest in the CSR.
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*/
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#define BCSR0_LED0 ((uint)0x02000000) /* 0 == on */
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#define BCSR0_LED1 ((uint)0x01000000) /* 0 == on */
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#define BCSR1_FETHIEN ((uint)0x08000000) /* 0 == enable*/
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#define BCSR1_FETH_RST ((uint)0x04000000) /* 0 == reset */
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#define BCSR1_RS232_EN1 ((uint)0x02000000) /* 0 ==enable */
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#define BCSR1_RS232_EN2 ((uint)0x01000000) /* 0 ==enable */
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#define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable*/
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#define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */
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/* cpm serial driver works with constants below */
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#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
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#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
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#endif /* __MACH_ADS8260_DEFS */
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#endif /* __KERNEL__ */
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