102178108e
Some releases this branch is nearly empty, others we have more stuff. It
tends to gather drivers that need SoC modification or dependencies such
that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we have merged in will remain stable),
as well as dependencies on a few clock branches.
In general, new items here are:
- Qualcomm driver for SMM/SMD, which is how they communicate with the
coprocessors on (some) of their platforms
- Memory controller work for ARM's PL172 memory controller
- Reset drivers for various platforms
- PMU power domain support for Marvell platforms
- Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Some releases this branch is nearly empty, others we have more stuff.
It tends to gather drivers that need SoC modification or dependencies
such that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we have merged in will remain stable),
as well as dependencies on a few clock branches.
In general, new items here are:
- Qualcomm driver for SMM/SMD, which is how they communicate with the
coprocessors on (some) of their platforms
- memory controller work for ARM's PL172 memory controller
- reset drivers for various platforms
- PMU power domain support for Marvell platforms
- Tegra support for T132/T210 SoCs: PMC, fuse, memory controller
per-SoC support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
ARM: tegra: Disable cpuidle if PSCI is available
soc/tegra: pmc: Use existing pclk reference
soc/tegra: pmc: Remove unnecessary return statement
soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
memory: tegra: Add Tegra210 support
memory: tegra: Add support for a variable-size client ID bitfield
clk: shmobile: rz: Add CPG/MSTP Clock Domain support
clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
clk: shmobile: Add CPG/MSTP Clock Domain support
ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
MIPS: ath79: Add the reset controller to the AR9132 dtsi
reset: Add a driver for the reset controller on the AR71XX/AR9XXX
devicetree: Add bindings for the ATH79 reset controller
reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
doc: dt: add documentation for lpc1850-rgu reset driver
...
174 lines
3.5 KiB
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174 lines
3.5 KiB
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config ARCH_SHMOBILE
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bool
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select ZONE_DMA if ARM_LPAE
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config PM_RCAR
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bool
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select PM_GENERIC_DOMAINS if PM
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config PM_RMOBILE
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bool
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select PM_GENERIC_DOMAINS
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config ARCH_RCAR_GEN1
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bool
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select PM_RCAR if PM || SMP
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select RENESAS_INTC_IRQPIN
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select SYS_SUPPORTS_SH_TMU
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config ARCH_RCAR_GEN2
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bool
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select PM_RCAR if PM || SMP
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select RENESAS_IRQC
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select SYS_SUPPORTS_SH_CMT
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select PCI_DOMAINS if PCI
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config ARCH_RMOBILE
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bool
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select PM_RMOBILE if PM
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select SYS_SUPPORTS_SH_CMT
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select SYS_SUPPORTS_SH_TMU
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menuconfig ARCH_SHMOBILE_MULTI
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bool "Renesas ARM SoCs" if ARCH_MULTI_V7
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depends on MMU
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select ARCH_SHMOBILE
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select ARM_GIC
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select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
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select NO_IOPORT_MAP
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select PINCTRL
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select ARCH_REQUIRE_GPIOLIB
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if ARCH_SHMOBILE_MULTI
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#comment "Renesas ARM SoCs System Type"
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config ARCH_EMEV2
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bool "Emma Mobile EV2"
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select SYS_SUPPORTS_EM_STI
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config ARCH_R7S72100
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bool "RZ/A1H (R7S72100)"
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select PM_GENERIC_DOMAINS if PM
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select SYS_SUPPORTS_SH_MTU2
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config ARCH_R8A73A4
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bool "R-Mobile APE6 (R8A73A40)"
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select ARCH_RMOBILE
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select RENESAS_IRQC
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config ARCH_R8A7740
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bool "R-Mobile A1 (R8A77400)"
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select ARCH_RMOBILE
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select RENESAS_INTC_IRQPIN
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config ARCH_R8A7778
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bool "R-Car M1A (R8A77781)"
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select ARCH_RCAR_GEN1
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config ARCH_R8A7779
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bool "R-Car H1 (R8A77790)"
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select ARCH_RCAR_GEN1
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config ARCH_R8A7790
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bool "R-Car H2 (R8A77900)"
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select ARCH_RCAR_GEN2
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select I2C
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config ARCH_R8A7791
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bool "R-Car M2-W (R8A77910)"
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select ARCH_RCAR_GEN2
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select I2C
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config ARCH_R8A7793
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bool "R-Car M2-N (R8A7793)"
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select ARCH_RCAR_GEN2
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select I2C
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config ARCH_R8A7794
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bool "R-Car E2 (R8A77940)"
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select ARCH_RCAR_GEN2
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config ARCH_SH73A0
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bool "SH-Mobile AG5 (R8A73A00)"
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select ARCH_RMOBILE
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select RENESAS_INTC_IRQPIN
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comment "Renesas ARM SoCs System Configuration"
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endif
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if ARCH_SHMOBILE_LEGACY
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comment "Renesas ARM SoCs System Type"
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config ARCH_R8A7778
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bool "R-Car M1A (R8A77781)"
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select ARCH_RCAR_GEN1
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_GIC
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config ARCH_R8A7779
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bool "R-Car H1 (R8A77790)"
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select ARCH_RCAR_GEN1
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_GIC
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comment "Renesas ARM SoCs Board Type"
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config MACH_BOCKW
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bool "BOCK-W platform"
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depends on ARCH_R8A7778
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select ARCH_REQUIRE_GPIOLIB
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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select SND_SOC_AK4554 if SND_SIMPLE_CARD
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select SND_SOC_AK4642 if SND_SIMPLE_CARD && I2C
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select USE_OF
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config MACH_BOCKW_REFERENCE
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bool "BOCK-W - Reference Device Tree Implementation"
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depends on ARCH_R8A7778
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select ARCH_REQUIRE_GPIOLIB
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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select USE_OF
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---help---
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Use reference implementation of BockW board support
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which makes use of device tree at the expense
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of not supporting a number of devices.
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This is intended to aid developers
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comment "Renesas ARM SoCs System Configuration"
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config CPU_HAS_INTEVT
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bool
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default y
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config SH_CLK_CPG
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bool
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source "drivers/sh/Kconfig"
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endif
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if ARCH_SHMOBILE
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menu "Timer and clock configuration"
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config SHMOBILE_TIMER_HZ
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int "Kernel HZ (jiffies per second)"
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range 32 1024
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default "128"
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help
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Allows the configuration of the timer frequency. It is customary
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to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
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case of low timer frequencies other values may be more suitable.
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Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
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want to select a HZ value such as 128 that can evenly divide RCLK.
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A HZ value that does not divide evenly may cause timer drift.
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endmenu
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endif
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