Ville Syrjälä 6481d5ed07 drm/i915: Disable GMBUS clock gating around GMBUS transfers on gen9+ ... Gen9+ need to disable GMBUS clock gating when doing multi part transfers. Otherwise clock gating will kick in when GMBUS is in the WAIT state and presumably that will corrupt the transfer. This is documented as Display WA #0868. Apparently older hardware doesn't allow clock gating in the WAIT state and thus are unaffected by this problem. v2: Limit the PCH w/a to gen9 and gen10 only (DK) Actually change it to check the PCH type instead since it's the PCH that actually contains the GMBUS hardware Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20171221202432.17373-1-ville.syrjala@linux.intel.com		2017-12-22 14:23:14 +02:00
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drm	drm/i915: Disable GMBUS clock gating around GMBUS transfers on gen9+	2017-12-22 14:23:14 +02:00
host1x
ipu-v3
vga
Makefile