![Daniel Thompson](/assets/img/avatar_default.png)
Commit c6a97c42e3
("hwrng: stm32 - add support for STM32 HW RNG")
was inadequately tested (actually it was tested quite hard so
incompetent would be a better description that inadequate) and does
not compile on platforms with CONFIG_PM set.
Fix this.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
203 lines
4.9 KiB
C
203 lines
4.9 KiB
C
/*
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* Copyright (c) 2015, Daniel Thompson
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*
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* This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#define RNG_CR 0x00
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#define RNG_CR_RNGEN BIT(2)
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#define RNG_SR 0x04
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#define RNG_SR_SEIS BIT(6)
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#define RNG_SR_CEIS BIT(5)
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#define RNG_SR_DRDY BIT(0)
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#define RNG_DR 0x08
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/*
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* It takes 40 cycles @ 48MHz to generate each random number (e.g. <1us).
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* At the time of writing STM32 parts max out at ~200MHz meaning a timeout
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* of 500 leaves us a very comfortable margin for error. The loop to which
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* the timeout applies takes at least 4 instructions per iteration so the
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* timeout is enough to take us up to multi-GHz parts!
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*/
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#define RNG_TIMEOUT 500
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struct stm32_rng_private {
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struct hwrng rng;
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void __iomem *base;
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struct clk *clk;
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};
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static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
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{
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struct stm32_rng_private *priv =
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container_of(rng, struct stm32_rng_private, rng);
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u32 sr;
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int retval = 0;
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pm_runtime_get_sync((struct device *) priv->rng.priv);
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while (max > sizeof(u32)) {
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sr = readl_relaxed(priv->base + RNG_SR);
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if (!sr && wait) {
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unsigned int timeout = RNG_TIMEOUT;
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do {
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cpu_relax();
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sr = readl_relaxed(priv->base + RNG_SR);
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} while (!sr && --timeout);
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}
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/* If error detected or data not ready... */
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if (sr != RNG_SR_DRDY)
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break;
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*(u32 *)data = readl_relaxed(priv->base + RNG_DR);
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retval += sizeof(u32);
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data += sizeof(u32);
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max -= sizeof(u32);
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}
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if (WARN_ONCE(sr & (RNG_SR_SEIS | RNG_SR_CEIS),
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"bad RNG status - %x\n", sr))
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writel_relaxed(0, priv->base + RNG_SR);
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pm_runtime_mark_last_busy((struct device *) priv->rng.priv);
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pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv);
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return retval || !wait ? retval : -EIO;
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}
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static int stm32_rng_init(struct hwrng *rng)
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{
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struct stm32_rng_private *priv =
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container_of(rng, struct stm32_rng_private, rng);
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int err;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return err;
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writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
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/* clear error indicators */
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writel_relaxed(0, priv->base + RNG_SR);
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return 0;
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}
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static void stm32_rng_cleanup(struct hwrng *rng)
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{
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struct stm32_rng_private *priv =
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container_of(rng, struct stm32_rng_private, rng);
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writel_relaxed(0, priv->base + RNG_CR);
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clk_disable_unprepare(priv->clk);
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}
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static int stm32_rng_probe(struct platform_device *ofdev)
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{
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struct device *dev = &ofdev->dev;
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struct device_node *np = ofdev->dev.of_node;
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struct stm32_rng_private *priv;
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struct resource res;
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int err;
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priv = devm_kzalloc(dev, sizeof(struct stm32_rng_private), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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err = of_address_to_resource(np, 0, &res);
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if (err)
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return err;
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priv->base = devm_ioremap_resource(dev, &res);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->clk = devm_clk_get(&ofdev->dev, NULL);
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if (IS_ERR(priv->clk))
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return PTR_ERR(priv->clk);
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dev_set_drvdata(dev, priv);
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priv->rng.name = dev_driver_string(dev),
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#ifndef CONFIG_PM
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priv->rng.init = stm32_rng_init,
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priv->rng.cleanup = stm32_rng_cleanup,
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#endif
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priv->rng.read = stm32_rng_read,
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priv->rng.priv = (unsigned long) dev;
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pm_runtime_set_autosuspend_delay(dev, 100);
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pm_runtime_use_autosuspend(dev);
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pm_runtime_enable(dev);
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return devm_hwrng_register(dev, &priv->rng);
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}
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#ifdef CONFIG_PM
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static int stm32_rng_runtime_suspend(struct device *dev)
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{
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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stm32_rng_cleanup(&priv->rng);
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return 0;
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}
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static int stm32_rng_runtime_resume(struct device *dev)
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{
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struct stm32_rng_private *priv = dev_get_drvdata(dev);
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return stm32_rng_init(&priv->rng);
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}
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#endif
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static UNIVERSAL_DEV_PM_OPS(stm32_rng_pm_ops, stm32_rng_runtime_suspend,
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stm32_rng_runtime_resume, NULL);
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static const struct of_device_id stm32_rng_match[] = {
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{
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.compatible = "st,stm32-rng",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_rng_match);
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static struct platform_driver stm32_rng_driver = {
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.driver = {
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.name = "stm32-rng",
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.pm = &stm32_rng_pm_ops,
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.of_match_table = stm32_rng_match,
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},
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.probe = stm32_rng_probe,
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};
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module_platform_driver(stm32_rng_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Daniel Thompson <daniel.thompson@linaro.org>");
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MODULE_DESCRIPTION("STMicroelectronics STM32 RNG device driver");
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