![Dave Jiang](/assets/img/avatar_default.png)
The clean up routine when we failed to allocate kthread is not cleaning up all the threads, only the same one over and over again. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Acked-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
765 lines
18 KiB
C
765 lines
18 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2015 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2015 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copy
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* PCIe NTB Perf Linux driver
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/kthread.h>
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#include <linux/time.h>
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#include <linux/timer.h>
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#include <linux/dma-mapping.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/debugfs.h>
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#include <linux/dmaengine.h>
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#include <linux/delay.h>
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#include <linux/sizes.h>
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#include <linux/ntb.h>
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#define DRIVER_NAME "ntb_perf"
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#define DRIVER_DESCRIPTION "PCIe NTB Performance Measurement Tool"
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#define DRIVER_LICENSE "Dual BSD/GPL"
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#define DRIVER_VERSION "1.0"
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#define DRIVER_AUTHOR "Dave Jiang <dave.jiang@intel.com>"
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#define PERF_LINK_DOWN_TIMEOUT 10
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#define PERF_VERSION 0xffff0001
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#define MAX_THREADS 32
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#define MAX_TEST_SIZE SZ_1M
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#define MAX_SRCS 32
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#define DMA_OUT_RESOURCE_TO 50
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#define DMA_RETRIES 20
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#define SZ_4G (1ULL << 32)
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#define MAX_SEG_ORDER 20 /* no larger than 1M for kmalloc buffer */
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MODULE_LICENSE(DRIVER_LICENSE);
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MODULE_VERSION(DRIVER_VERSION);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
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static struct dentry *perf_debugfs_dir;
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static unsigned int seg_order = 19; /* 512K */
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module_param(seg_order, uint, 0644);
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MODULE_PARM_DESC(seg_order, "size order [n^2] of buffer segment for testing");
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static unsigned int run_order = 32; /* 4G */
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module_param(run_order, uint, 0644);
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MODULE_PARM_DESC(run_order, "size order [n^2] of total data to transfer");
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static bool use_dma; /* default to 0 */
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module_param(use_dma, bool, 0644);
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MODULE_PARM_DESC(use_dma, "Using DMA engine to measure performance");
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struct perf_mw {
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phys_addr_t phys_addr;
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resource_size_t phys_size;
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resource_size_t xlat_align;
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resource_size_t xlat_align_size;
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void __iomem *vbase;
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size_t xlat_size;
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size_t buf_size;
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void *virt_addr;
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dma_addr_t dma_addr;
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};
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struct perf_ctx;
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struct pthr_ctx {
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struct task_struct *thread;
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struct perf_ctx *perf;
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atomic_t dma_sync;
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struct dma_chan *dma_chan;
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int dma_prep_err;
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int src_idx;
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void *srcs[MAX_SRCS];
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};
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struct perf_ctx {
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struct ntb_dev *ntb;
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spinlock_t db_lock;
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struct perf_mw mw;
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bool link_is_up;
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struct work_struct link_cleanup;
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struct delayed_work link_work;
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struct dentry *debugfs_node_dir;
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struct dentry *debugfs_run;
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struct dentry *debugfs_threads;
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u8 perf_threads;
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bool run;
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struct pthr_ctx pthr_ctx[MAX_THREADS];
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atomic_t tsync;
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};
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enum {
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VERSION = 0,
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MW_SZ_HIGH,
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MW_SZ_LOW,
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SPAD_MSG,
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SPAD_ACK,
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MAX_SPAD
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};
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static void perf_link_event(void *ctx)
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{
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struct perf_ctx *perf = ctx;
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if (ntb_link_is_up(perf->ntb, NULL, NULL) == 1)
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schedule_delayed_work(&perf->link_work, 2*HZ);
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else
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schedule_work(&perf->link_cleanup);
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}
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static void perf_db_event(void *ctx, int vec)
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{
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struct perf_ctx *perf = ctx;
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u64 db_bits, db_mask;
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db_mask = ntb_db_vector_mask(perf->ntb, vec);
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db_bits = ntb_db_read(perf->ntb);
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dev_dbg(&perf->ntb->dev, "doorbell vec %d mask %#llx bits %#llx\n",
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vec, db_mask, db_bits);
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}
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static const struct ntb_ctx_ops perf_ops = {
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.link_event = perf_link_event,
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.db_event = perf_db_event,
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};
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static void perf_copy_callback(void *data)
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{
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struct pthr_ctx *pctx = data;
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atomic_dec(&pctx->dma_sync);
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}
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static ssize_t perf_copy(struct pthr_ctx *pctx, char __iomem *dst,
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char *src, size_t size)
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{
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struct perf_ctx *perf = pctx->perf;
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struct dma_async_tx_descriptor *txd;
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struct dma_chan *chan = pctx->dma_chan;
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struct dma_device *device;
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struct dmaengine_unmap_data *unmap;
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dma_cookie_t cookie;
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size_t src_off, dst_off;
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struct perf_mw *mw = &perf->mw;
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void __iomem *vbase;
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void __iomem *dst_vaddr;
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dma_addr_t dst_phys;
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int retries = 0;
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if (!use_dma) {
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memcpy_toio(dst, src, size);
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return size;
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}
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if (!chan) {
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dev_err(&perf->ntb->dev, "DMA engine does not exist\n");
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return -EINVAL;
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}
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device = chan->device;
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src_off = (uintptr_t)src & ~PAGE_MASK;
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dst_off = (uintptr_t __force)dst & ~PAGE_MASK;
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if (!is_dma_copy_aligned(device, src_off, dst_off, size))
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return -ENODEV;
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vbase = mw->vbase;
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dst_vaddr = dst;
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dst_phys = mw->phys_addr + (dst_vaddr - vbase);
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unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
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if (!unmap)
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return -ENOMEM;
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unmap->len = size;
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unmap->addr[0] = dma_map_page(device->dev, virt_to_page(src),
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src_off, size, DMA_TO_DEVICE);
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if (dma_mapping_error(device->dev, unmap->addr[0]))
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goto err_get_unmap;
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unmap->to_cnt = 1;
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do {
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txd = device->device_prep_dma_memcpy(chan, dst_phys,
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unmap->addr[0],
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size, DMA_PREP_INTERRUPT);
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if (!txd) {
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(DMA_OUT_RESOURCE_TO);
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}
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} while (!txd && (++retries < DMA_RETRIES));
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if (!txd) {
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pctx->dma_prep_err++;
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goto err_get_unmap;
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}
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txd->callback = perf_copy_callback;
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txd->callback_param = pctx;
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dma_set_unmap(txd, unmap);
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cookie = dmaengine_submit(txd);
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if (dma_submit_error(cookie))
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goto err_set_unmap;
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atomic_inc(&pctx->dma_sync);
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dma_async_issue_pending(chan);
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return size;
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err_set_unmap:
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dmaengine_unmap_put(unmap);
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err_get_unmap:
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dmaengine_unmap_put(unmap);
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return 0;
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}
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static int perf_move_data(struct pthr_ctx *pctx, char __iomem *dst, char *src,
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u64 buf_size, u64 win_size, u64 total)
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{
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int chunks, total_chunks, i;
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int copied_chunks = 0;
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u64 copied = 0, result;
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char __iomem *tmp = dst;
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u64 perf, diff_us;
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ktime_t kstart, kstop, kdiff;
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chunks = div64_u64(win_size, buf_size);
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total_chunks = div64_u64(total, buf_size);
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kstart = ktime_get();
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for (i = 0; i < total_chunks; i++) {
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result = perf_copy(pctx, tmp, src, buf_size);
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copied += result;
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copied_chunks++;
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if (copied_chunks == chunks) {
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tmp = dst;
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copied_chunks = 0;
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} else
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tmp += buf_size;
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/* Probably should schedule every 4GB to prevent soft hang. */
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if (((copied % SZ_4G) == 0) && !use_dma) {
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(1);
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}
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}
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if (use_dma) {
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pr_info("%s: All DMA descriptors submitted\n", current->comm);
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while (atomic_read(&pctx->dma_sync) != 0)
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msleep(20);
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}
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kstop = ktime_get();
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kdiff = ktime_sub(kstop, kstart);
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diff_us = ktime_to_us(kdiff);
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pr_info("%s: copied %llu bytes\n", current->comm, copied);
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pr_info("%s: lasted %llu usecs\n", current->comm, diff_us);
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perf = div64_u64(copied, diff_us);
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pr_info("%s: MBytes/s: %llu\n", current->comm, perf);
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return 0;
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}
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static bool perf_dma_filter_fn(struct dma_chan *chan, void *node)
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{
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return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
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}
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static int ntb_perf_thread(void *data)
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{
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struct pthr_ctx *pctx = data;
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struct perf_ctx *perf = pctx->perf;
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struct pci_dev *pdev = perf->ntb->pdev;
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struct perf_mw *mw = &perf->mw;
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char __iomem *dst;
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u64 win_size, buf_size, total;
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void *src;
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int rc, node, i;
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struct dma_chan *dma_chan = NULL;
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pr_info("kthread %s starting...\n", current->comm);
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node = dev_to_node(&pdev->dev);
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if (use_dma && !pctx->dma_chan) {
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dma_cap_mask_t dma_mask;
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dma_cap_zero(dma_mask);
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dma_cap_set(DMA_MEMCPY, dma_mask);
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dma_chan = dma_request_channel(dma_mask, perf_dma_filter_fn,
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(void *)(unsigned long)node);
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if (!dma_chan) {
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pr_warn("%s: cannot acquire DMA channel, quitting\n",
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current->comm);
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return -ENODEV;
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}
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pctx->dma_chan = dma_chan;
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}
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for (i = 0; i < MAX_SRCS; i++) {
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pctx->srcs[i] = kmalloc_node(MAX_TEST_SIZE, GFP_KERNEL, node);
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if (!pctx->srcs[i]) {
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rc = -ENOMEM;
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goto err;
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}
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}
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win_size = mw->phys_size;
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buf_size = 1ULL << seg_order;
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total = 1ULL << run_order;
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if (buf_size > MAX_TEST_SIZE)
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buf_size = MAX_TEST_SIZE;
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dst = (char __iomem *)mw->vbase;
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atomic_inc(&perf->tsync);
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while (atomic_read(&perf->tsync) != perf->perf_threads)
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schedule();
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src = pctx->srcs[pctx->src_idx];
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pctx->src_idx = (pctx->src_idx + 1) & (MAX_SRCS - 1);
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rc = perf_move_data(pctx, dst, src, buf_size, win_size, total);
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atomic_dec(&perf->tsync);
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if (rc < 0) {
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pr_err("%s: failed\n", current->comm);
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rc = -ENXIO;
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goto err;
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}
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for (i = 0; i < MAX_SRCS; i++) {
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kfree(pctx->srcs[i]);
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pctx->srcs[i] = NULL;
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}
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return 0;
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err:
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for (i = 0; i < MAX_SRCS; i++) {
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kfree(pctx->srcs[i]);
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pctx->srcs[i] = NULL;
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}
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if (dma_chan) {
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dma_release_channel(dma_chan);
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pctx->dma_chan = NULL;
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}
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return rc;
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}
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static void perf_free_mw(struct perf_ctx *perf)
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{
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struct perf_mw *mw = &perf->mw;
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struct pci_dev *pdev = perf->ntb->pdev;
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if (!mw->virt_addr)
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return;
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ntb_mw_clear_trans(perf->ntb, 0);
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dma_free_coherent(&pdev->dev, mw->buf_size,
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mw->virt_addr, mw->dma_addr);
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mw->xlat_size = 0;
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mw->buf_size = 0;
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mw->virt_addr = NULL;
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}
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static int perf_set_mw(struct perf_ctx *perf, resource_size_t size)
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{
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struct perf_mw *mw = &perf->mw;
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size_t xlat_size, buf_size;
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int rc;
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if (!size)
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return -EINVAL;
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xlat_size = round_up(size, mw->xlat_align_size);
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buf_size = round_up(size, mw->xlat_align);
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if (mw->xlat_size == xlat_size)
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return 0;
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if (mw->buf_size)
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perf_free_mw(perf);
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mw->xlat_size = xlat_size;
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mw->buf_size = buf_size;
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mw->virt_addr = dma_alloc_coherent(&perf->ntb->pdev->dev, buf_size,
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&mw->dma_addr, GFP_KERNEL);
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if (!mw->virt_addr) {
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mw->xlat_size = 0;
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mw->buf_size = 0;
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}
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rc = ntb_mw_set_trans(perf->ntb, 0, mw->dma_addr, mw->xlat_size);
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if (rc) {
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dev_err(&perf->ntb->dev, "Unable to set mw0 translation\n");
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perf_free_mw(perf);
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return -EIO;
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}
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return 0;
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}
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static void perf_link_work(struct work_struct *work)
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{
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struct perf_ctx *perf =
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container_of(work, struct perf_ctx, link_work.work);
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struct ntb_dev *ndev = perf->ntb;
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struct pci_dev *pdev = ndev->pdev;
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u32 val;
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u64 size;
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int rc;
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dev_dbg(&perf->ntb->pdev->dev, "%s called\n", __func__);
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size = perf->mw.phys_size;
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ntb_peer_spad_write(ndev, MW_SZ_HIGH, upper_32_bits(size));
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ntb_peer_spad_write(ndev, MW_SZ_LOW, lower_32_bits(size));
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ntb_peer_spad_write(ndev, VERSION, PERF_VERSION);
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/* now read what peer wrote */
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val = ntb_spad_read(ndev, VERSION);
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if (val != PERF_VERSION) {
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dev_dbg(&pdev->dev, "Remote version = %#x\n", val);
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goto out;
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}
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val = ntb_spad_read(ndev, MW_SZ_HIGH);
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size = (u64)val << 32;
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val = ntb_spad_read(ndev, MW_SZ_LOW);
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size |= val;
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dev_dbg(&pdev->dev, "Remote MW size = %#llx\n", size);
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rc = perf_set_mw(perf, size);
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if (rc)
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goto out1;
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perf->link_is_up = true;
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return;
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out1:
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perf_free_mw(perf);
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out:
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if (ntb_link_is_up(ndev, NULL, NULL) == 1)
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schedule_delayed_work(&perf->link_work,
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msecs_to_jiffies(PERF_LINK_DOWN_TIMEOUT));
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}
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static void perf_link_cleanup(struct work_struct *work)
|
|
{
|
|
struct perf_ctx *perf = container_of(work,
|
|
struct perf_ctx,
|
|
link_cleanup);
|
|
|
|
dev_dbg(&perf->ntb->pdev->dev, "%s called\n", __func__);
|
|
|
|
if (!perf->link_is_up)
|
|
cancel_delayed_work_sync(&perf->link_work);
|
|
}
|
|
|
|
static int perf_setup_mw(struct ntb_dev *ntb, struct perf_ctx *perf)
|
|
{
|
|
struct perf_mw *mw;
|
|
int rc;
|
|
|
|
mw = &perf->mw;
|
|
|
|
rc = ntb_mw_get_range(ntb, 0, &mw->phys_addr, &mw->phys_size,
|
|
&mw->xlat_align, &mw->xlat_align_size);
|
|
if (rc)
|
|
return rc;
|
|
|
|
perf->mw.vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
|
|
if (!mw->vbase)
|
|
return -ENOMEM;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t debugfs_run_read(struct file *filp, char __user *ubuf,
|
|
size_t count, loff_t *offp)
|
|
{
|
|
struct perf_ctx *perf = filp->private_data;
|
|
char *buf;
|
|
ssize_t ret, out_offset;
|
|
|
|
if (!perf)
|
|
return 0;
|
|
|
|
buf = kmalloc(64, GFP_KERNEL);
|
|
if (!buf)
|
|
return -ENOMEM;
|
|
out_offset = snprintf(buf, 64, "%d\n", perf->run);
|
|
ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
|
|
kfree(buf);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void threads_cleanup(struct perf_ctx *perf)
|
|
{
|
|
struct pthr_ctx *pctx;
|
|
int i;
|
|
|
|
perf->run = false;
|
|
for (i = 0; i < MAX_THREADS; i++) {
|
|
pctx = &perf->pthr_ctx[i];
|
|
if (pctx->thread) {
|
|
kthread_stop(pctx->thread);
|
|
pctx->thread = NULL;
|
|
}
|
|
}
|
|
}
|
|
|
|
static ssize_t debugfs_run_write(struct file *filp, const char __user *ubuf,
|
|
size_t count, loff_t *offp)
|
|
{
|
|
struct perf_ctx *perf = filp->private_data;
|
|
int node, i;
|
|
|
|
if (!perf->link_is_up)
|
|
return 0;
|
|
|
|
if (perf->perf_threads == 0)
|
|
return 0;
|
|
|
|
if (atomic_read(&perf->tsync) == 0)
|
|
perf->run = false;
|
|
|
|
if (perf->run)
|
|
threads_cleanup(perf);
|
|
else {
|
|
perf->run = true;
|
|
|
|
if (perf->perf_threads > MAX_THREADS) {
|
|
perf->perf_threads = MAX_THREADS;
|
|
pr_info("Reset total threads to: %u\n", MAX_THREADS);
|
|
}
|
|
|
|
/* no greater than 1M */
|
|
if (seg_order > MAX_SEG_ORDER) {
|
|
seg_order = MAX_SEG_ORDER;
|
|
pr_info("Fix seg_order to %u\n", seg_order);
|
|
}
|
|
|
|
if (run_order < seg_order) {
|
|
run_order = seg_order;
|
|
pr_info("Fix run_order to %u\n", run_order);
|
|
}
|
|
|
|
node = dev_to_node(&perf->ntb->pdev->dev);
|
|
/* launch kernel thread */
|
|
for (i = 0; i < perf->perf_threads; i++) {
|
|
struct pthr_ctx *pctx;
|
|
|
|
pctx = &perf->pthr_ctx[i];
|
|
atomic_set(&pctx->dma_sync, 0);
|
|
pctx->perf = perf;
|
|
pctx->thread =
|
|
kthread_create_on_node(ntb_perf_thread,
|
|
(void *)pctx,
|
|
node, "ntb_perf %d", i);
|
|
if (IS_ERR(pctx->thread)) {
|
|
pctx->thread = NULL;
|
|
goto err;
|
|
} else
|
|
wake_up_process(pctx->thread);
|
|
|
|
if (perf->run == false)
|
|
return -ENXIO;
|
|
}
|
|
|
|
}
|
|
|
|
return count;
|
|
|
|
err:
|
|
threads_cleanup(perf);
|
|
return -ENXIO;
|
|
}
|
|
|
|
static const struct file_operations ntb_perf_debugfs_run = {
|
|
.owner = THIS_MODULE,
|
|
.open = simple_open,
|
|
.read = debugfs_run_read,
|
|
.write = debugfs_run_write,
|
|
};
|
|
|
|
static int perf_debugfs_setup(struct perf_ctx *perf)
|
|
{
|
|
struct pci_dev *pdev = perf->ntb->pdev;
|
|
|
|
if (!debugfs_initialized())
|
|
return -ENODEV;
|
|
|
|
if (!perf_debugfs_dir) {
|
|
perf_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
|
|
if (!perf_debugfs_dir)
|
|
return -ENODEV;
|
|
}
|
|
|
|
perf->debugfs_node_dir = debugfs_create_dir(pci_name(pdev),
|
|
perf_debugfs_dir);
|
|
if (!perf->debugfs_node_dir)
|
|
return -ENODEV;
|
|
|
|
perf->debugfs_run = debugfs_create_file("run", S_IRUSR | S_IWUSR,
|
|
perf->debugfs_node_dir, perf,
|
|
&ntb_perf_debugfs_run);
|
|
if (!perf->debugfs_run)
|
|
return -ENODEV;
|
|
|
|
perf->debugfs_threads = debugfs_create_u8("threads", S_IRUSR | S_IWUSR,
|
|
perf->debugfs_node_dir,
|
|
&perf->perf_threads);
|
|
if (!perf->debugfs_threads)
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int perf_probe(struct ntb_client *client, struct ntb_dev *ntb)
|
|
{
|
|
struct pci_dev *pdev = ntb->pdev;
|
|
struct perf_ctx *perf;
|
|
int node;
|
|
int rc = 0;
|
|
|
|
node = dev_to_node(&pdev->dev);
|
|
|
|
perf = kzalloc_node(sizeof(*perf), GFP_KERNEL, node);
|
|
if (!perf) {
|
|
rc = -ENOMEM;
|
|
goto err_perf;
|
|
}
|
|
|
|
perf->ntb = ntb;
|
|
perf->perf_threads = 1;
|
|
atomic_set(&perf->tsync, 0);
|
|
perf->run = false;
|
|
spin_lock_init(&perf->db_lock);
|
|
perf_setup_mw(ntb, perf);
|
|
INIT_DELAYED_WORK(&perf->link_work, perf_link_work);
|
|
INIT_WORK(&perf->link_cleanup, perf_link_cleanup);
|
|
|
|
rc = ntb_set_ctx(ntb, perf, &perf_ops);
|
|
if (rc)
|
|
goto err_ctx;
|
|
|
|
perf->link_is_up = false;
|
|
ntb_link_enable(ntb, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
|
|
ntb_link_event(ntb);
|
|
|
|
rc = perf_debugfs_setup(perf);
|
|
if (rc)
|
|
goto err_ctx;
|
|
|
|
return 0;
|
|
|
|
err_ctx:
|
|
cancel_delayed_work_sync(&perf->link_work);
|
|
cancel_work_sync(&perf->link_cleanup);
|
|
kfree(perf);
|
|
err_perf:
|
|
return rc;
|
|
}
|
|
|
|
static void perf_remove(struct ntb_client *client, struct ntb_dev *ntb)
|
|
{
|
|
struct perf_ctx *perf = ntb->ctx;
|
|
int i;
|
|
|
|
dev_dbg(&perf->ntb->dev, "%s called\n", __func__);
|
|
|
|
cancel_delayed_work_sync(&perf->link_work);
|
|
cancel_work_sync(&perf->link_cleanup);
|
|
|
|
ntb_clear_ctx(ntb);
|
|
ntb_link_disable(ntb);
|
|
|
|
debugfs_remove_recursive(perf_debugfs_dir);
|
|
perf_debugfs_dir = NULL;
|
|
|
|
if (use_dma) {
|
|
for (i = 0; i < MAX_THREADS; i++) {
|
|
struct pthr_ctx *pctx = &perf->pthr_ctx[i];
|
|
|
|
if (pctx->dma_chan)
|
|
dma_release_channel(pctx->dma_chan);
|
|
}
|
|
}
|
|
|
|
kfree(perf);
|
|
}
|
|
|
|
static struct ntb_client perf_client = {
|
|
.ops = {
|
|
.probe = perf_probe,
|
|
.remove = perf_remove,
|
|
},
|
|
};
|
|
module_ntb_client(perf_client);
|