ae02ab00aa
Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as well as the hardware BCH controller. DMA is not currently implemented. While older 47xx SoCs also have a BCH controller, they are incompatible with the one in the 4780 due to differing register/bit positions, which would make implementing a common driver for them quite messy. Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Brian: fixed a few small mistakes] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
/*
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* JZ4780 BCH controller
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*
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* Copyright (c) 2015 Imagination Technologies
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* Author: Alex Smith <alex.smith@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_H__
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#define __DRIVERS_MTD_NAND_JZ4780_BCH_H__
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#include <linux/types.h>
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struct device;
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struct device_node;
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struct jz4780_bch;
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/**
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* struct jz4780_bch_params - BCH parameters
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* @size: data bytes per ECC step.
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* @bytes: ECC bytes per step.
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* @strength: number of correctable bits per ECC step.
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*/
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struct jz4780_bch_params {
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int size;
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int bytes;
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int strength;
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};
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int jz4780_bch_calculate(struct jz4780_bch *bch,
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struct jz4780_bch_params *params,
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const u8 *buf, u8 *ecc_code);
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int jz4780_bch_correct(struct jz4780_bch *bch,
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struct jz4780_bch_params *params, u8 *buf,
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u8 *ecc_code);
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void jz4780_bch_release(struct jz4780_bch *bch);
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struct jz4780_bch *of_jz4780_bch_get(struct device_node *np);
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#endif /* __DRIVERS_MTD_NAND_JZ4780_BCH_H__ */
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