554c0a3abf
The rtl8723bs is found on quite a few systems used by Linux users, such as on Atom systems (Intel Computestick and various other Atom based devices) and on many (budget) ARM boards such as the CHIP. The plan moving forward with this is for the new clean, written from scratch, rtl8xxxu driver to eventually gain support for sdio devices. But there is no clear timeline for that, so lets add this driver included in staging for now. Cc: Bastien Nocera <hadess@hadess.net> Cc: Larry Finger <Larry.Finger@lwfinger.net> Cc: Jes Sorensen <jes.sorensen@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
129 lines
2.8 KiB
C
129 lines
2.8 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#ifndef __INC_HAL8723BPHYCFG_H__
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#define __INC_HAL8723BPHYCFG_H__
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/*--------------------------Define Parameters-------------------------------*/
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#define LOOP_LIMIT 5
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#define MAX_STALL_TIME 50 /* us */
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#define AntennaDiversityValue 0x80 /* Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) */
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#define MAX_TXPWR_IDX_NMODE_92S 63
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#define Reset_Cnt_Limit 3
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#define MAX_AGGR_NUM 0x07
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/*--------------------------Define Parameters End-------------------------------*/
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/*------------------------------Define structure----------------------------*/
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/*------------------------------Define structure End----------------------------*/
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/*--------------------------Exported Function prototype---------------------*/
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u32
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PHY_QueryBBReg_8723B(
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struct adapter *Adapter,
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u32 RegAddr,
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u32 BitMask
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);
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void
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PHY_SetBBReg_8723B(
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struct adapter *Adapter,
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u32 RegAddr,
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u32 BitMask,
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u32 Data
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);
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u32
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PHY_QueryRFReg_8723B(
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struct adapter * Adapter,
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u8 eRFPath,
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u32 RegAddr,
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u32 BitMask
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);
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void
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PHY_SetRFReg_8723B(
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struct adapter * Adapter,
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u8 eRFPath,
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u32 RegAddr,
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u32 BitMask,
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u32 Data
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);
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/* MAC/BB/RF HAL config */
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int PHY_BBConfig8723B(struct adapter *Adapter );
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int PHY_RFConfig8723B(struct adapter *Adapter );
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s32 PHY_MACConfig8723B(struct adapter *padapter);
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void
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PHY_SetTxPowerIndex_8723B(
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struct adapter * Adapter,
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u32 PowerIndex,
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u8 RFPath,
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u8 Rate
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);
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u8
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PHY_GetTxPowerIndex_8723B(
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struct adapter * padapter,
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u8 RFPath,
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u8 Rate,
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enum CHANNEL_WIDTH BandWidth,
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u8 Channel
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);
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void
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PHY_GetTxPowerLevel8723B(
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struct adapter * Adapter,
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s32* powerlevel
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);
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void
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PHY_SetTxPowerLevel8723B(
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struct adapter * Adapter,
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u8 channel
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);
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void
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PHY_SetBWMode8723B(
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struct adapter * Adapter,
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enum CHANNEL_WIDTH Bandwidth, /* 20M or 40M */
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unsigned char Offset /* Upper, Lower, or Don't care */
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);
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void
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PHY_SwChnl8723B(/* Call after initialization */
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struct adapter *Adapter,
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u8 channel
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);
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void
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PHY_SetSwChnlBWMode8723B(
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struct adapter * Adapter,
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u8 channel,
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enum CHANNEL_WIDTH Bandwidth,
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u8 Offset40,
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u8 Offset80
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);
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/*--------------------------Exported Function prototype End---------------------*/
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#endif
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