187 lines
3.2 KiB
ArmAsm
187 lines
3.2 KiB
ArmAsm
/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <linux/linkage.h>
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#include <asm/smp_scu.h>
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#include "hardware.h"
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#ifdef CONFIG_SMP
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.extern scu_base
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#endif
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.globl wfe_smp_freq_change_start
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.globl wfe_smp_freq_change_end
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#ifdef CONFIG_SMP
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.align 3
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.macro disable_l1_dcache
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/*
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* Flush all data from the L1 data cache before disabling
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* SCTLR.C bit.
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*/
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push {r0 - r11, lr}
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ldr r7, =v7_flush_kern_cache_all
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mov lr, pc
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mov pc, r7
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pop {r0 - r11, lr}
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/* disable d-cache */
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mrc p15, 0, r6, c1, c0, 0
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bic r6, r6, #0x4
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mcr p15, 0, r6, c1, c0, 0
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dsb
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isb
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push {r0 - r11, lr}
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ldr r7, =v7_flush_kern_cache_all
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mov lr, pc
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mov pc, r7
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pop {r0 - r11, lr}
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.endm
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ENTRY(wfe_smp_freq_change)
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wfe_smp_freq_change_start:
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push {r4 - r11, lr}
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mov r6, r0
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mov r7, r1
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dsb
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isb
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disable_l1_dcache
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isb
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/* Turn off SMP bit. */
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mrc p15, 0, r8, c1, c0, 1
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bic r8, r8, #0x40
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mcr p15, 0, r8, c1, c0, 1
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isb
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/* Inform the SCU we are going to enter WFE. */
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push {r0 - r11, lr}
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ldr r0,=scu_base
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ldr r0, [r0]
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mov r1, #SCU_PM_DORMANT
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ldr r3, =scu_power_mode
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mov lr, pc
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mov pc, r3
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pop {r0 - r11, lr}
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go_back_wfe:
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wfe
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ldr r3, [r7]
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cmp r3, #1
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beq go_back_wfe
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/* Turn ON SMP bit. */
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mrc p15, 0, r8, c1, c0, 1
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orr r8, r8, #0x40
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mcr p15, 0, r8, c1, c0, 1
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isb
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/* Enable L1 data cache. */
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mrc p15, 0, r8, c1, c0, 0
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orr r8, r8, #0x4
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mcr p15, 0, r8, c1, c0, 0
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isb
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/* Inform the SCU we have exited WFE. */
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push {r0 - r11, lr}
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ldr r0,=scu_base
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ldr r0, [r0]
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mov r1, #SCU_PM_NORMAL
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ldr r3, =scu_power_mode
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mov lr, pc
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mov pc, r3
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pop {r0 - r11, lr}
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/* Pop all saved registers. */
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pop {r4 - r11, lr}
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mov pc, lr
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.ltorg
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wfe_smp_freq_change_end:
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ENDPROC(wfe_smp_freq_change)
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#ifdef CONFIG_OPTEE
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/**
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* @brief Switch CPU in WFE mode while bus frequency change
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* on-going
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*
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* @param[in] r0 CPU in WFE Status
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* @param[in] r1 Bus frequency change status
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*/
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.globl imx_smp_wfe_optee_end
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ENTRY(imx_smp_wfe_optee)
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push {r4-r11, lr}
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dsb
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isb
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disable_l1_dcache
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isb
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/* Set flag CPU entering WFE. */
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mov r4, #1
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str r4, [r0]
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dsb
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isb
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1:
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wfe
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/* Check if busfreq is done, else loop */
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ldr r4, [r1]
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cmp r4, #1
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beq 1b
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/* Enable L1 data cache. */
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mrc p15, 0, r4, c1, c0, 0
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orr r4, r4, #0x4
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mcr p15, 0, r4, c1, c0, 0
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isb
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/* Set flag CPU exiting WFE. */
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mov r4, #0
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str r4, [r0]
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/* Pop all saved registers. */
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pop {r4-r11, lr}
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mov pc, lr
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.ltorg
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imx_smp_wfe_optee_end:
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ENDPROC(imx_smp_wfe_optee)
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#endif
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#endif
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