![Marc Zyngier](/assets/img/avatar_default.png)
Convert both Realview and VExpress to use struct smp_operations to provide their SMP and CPU hotplug operation. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
208 lines
4.4 KiB
C
208 lines
4.4 KiB
C
/*
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* linux/arch/arm/mach-vexpress/platsmp.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/of_fdt.h>
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#include <asm/smp_scu.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach/map.h>
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#include <mach/motherboard.h>
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#include <plat/platsmp.h>
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#include "core.h"
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#if defined(CONFIG_OF)
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static enum {
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GENERIC_SCU,
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CORTEX_A9_SCU,
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} vexpress_dt_scu __initdata = GENERIC_SCU;
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static struct map_desc vexpress_dt_cortex_a9_scu_map __initdata = {
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.virtual = V2T_PERIPH,
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/* .pfn set in vexpress_dt_init_cortex_a9_scu() */
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.length = SZ_128,
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.type = MT_DEVICE,
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};
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static void *vexpress_dt_cortex_a9_scu_base __initdata;
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const static char *vexpress_dt_cortex_a9_match[] __initconst = {
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"arm,cortex-a5-scu",
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"arm,cortex-a9-scu",
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NULL
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};
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static int __init vexpress_dt_find_scu(unsigned long node,
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const char *uname, int depth, void *data)
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{
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if (of_flat_dt_match(node, vexpress_dt_cortex_a9_match)) {
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phys_addr_t phys_addr;
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__be32 *reg = of_get_flat_dt_prop(node, "reg", NULL);
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if (WARN_ON(!reg))
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return -EINVAL;
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phys_addr = be32_to_cpup(reg);
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vexpress_dt_scu = CORTEX_A9_SCU;
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vexpress_dt_cortex_a9_scu_map.pfn = __phys_to_pfn(phys_addr);
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iotable_init(&vexpress_dt_cortex_a9_scu_map, 1);
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vexpress_dt_cortex_a9_scu_base = ioremap(phys_addr, SZ_256);
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if (WARN_ON(!vexpress_dt_cortex_a9_scu_base))
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return -EFAULT;
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}
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return 0;
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}
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void __init vexpress_dt_smp_map_io(void)
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{
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if (initial_boot_params)
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WARN_ON(of_scan_flat_dt(vexpress_dt_find_scu, NULL));
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}
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static int __init vexpress_dt_cpus_num(unsigned long node, const char *uname,
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int depth, void *data)
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{
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static int prev_depth = -1;
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static int nr_cpus = -1;
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if (prev_depth > depth && nr_cpus > 0)
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return nr_cpus;
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if (nr_cpus < 0 && strcmp(uname, "cpus") == 0)
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nr_cpus = 0;
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if (nr_cpus >= 0) {
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const char *device_type = of_get_flat_dt_prop(node,
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"device_type", NULL);
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if (device_type && strcmp(device_type, "cpu") == 0)
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nr_cpus++;
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}
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prev_depth = depth;
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return 0;
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}
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static void __init vexpress_dt_smp_init_cpus(void)
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{
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int ncores = 0, i;
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switch (vexpress_dt_scu) {
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case GENERIC_SCU:
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ncores = of_scan_flat_dt(vexpress_dt_cpus_num, NULL);
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break;
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case CORTEX_A9_SCU:
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ncores = scu_get_core_count(vexpress_dt_cortex_a9_scu_base);
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break;
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default:
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WARN_ON(1);
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break;
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}
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if (ncores < 2)
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return;
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if (ncores > nr_cpu_ids) {
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pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
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ncores, nr_cpu_ids);
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ncores = nr_cpu_ids;
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}
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for (i = 0; i < ncores; ++i)
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set_cpu_possible(i, true);
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set_smp_cross_call(gic_raise_softirq);
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}
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static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
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{
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int i;
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switch (vexpress_dt_scu) {
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case GENERIC_SCU:
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for (i = 0; i < max_cpus; i++)
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set_cpu_present(i, true);
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break;
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case CORTEX_A9_SCU:
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scu_enable(vexpress_dt_cortex_a9_scu_base);
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break;
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default:
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WARN_ON(1);
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break;
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}
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}
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#else
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static void __init vexpress_dt_smp_init_cpus(void)
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{
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WARN_ON(1);
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}
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void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
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{
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WARN_ON(1);
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}
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#endif
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/*
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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static void __init vexpress_smp_init_cpus(void)
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{
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if (ct_desc)
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ct_desc->init_cpu_map();
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else
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vexpress_dt_smp_init_cpus();
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}
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static void __init vexpress_smp_prepare_cpus(unsigned int max_cpus)
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{
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/*
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time.
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*/
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if (ct_desc)
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ct_desc->smp_enable(max_cpus);
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else
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vexpress_dt_smp_prepare_cpus(max_cpus);
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/*
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* Write the address of secondary startup into the
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* system-wide flags register. The boot monitor waits
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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*/
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v2m_flags_set(virt_to_phys(versatile_secondary_startup));
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}
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struct smp_operations __initdata vexpress_smp_ops = {
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.smp_init_cpus = vexpress_smp_init_cpus,
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.smp_prepare_cpus = vexpress_smp_prepare_cpus,
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.smp_secondary_init = versatile_secondary_init,
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.smp_boot_secondary = versatile_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = vexpress_cpu_die,
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#endif
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};
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