![Nishanth Menon](/assets/img/avatar_default.png)
Secure Proxy is another communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller. Secure proxy is, in effect, an evolution of current generation Message Manager hardware block found in K2G devices. However the following changes have taken place: Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated. Each Secure proxy thread can uniquely have their own error and threshold interrupts allowing for more fine control of IRQ handling. Provide the driver support for Secure Proxy and thread instances. NOTE: Secure proxy configuration is only done by System Controller, hence these are assumed to be pre-configured instances. See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
851 lines
24 KiB
C
851 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments' Message Manager Driver
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*
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* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
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* Nishanth Menon
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/soc/ti/ti-msgmgr.h>
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#define Q_DATA_OFFSET(proxy, queue, reg) \
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((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4))
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#define Q_STATE_OFFSET(queue) ((queue) * 0x4)
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#define Q_STATE_ENTRY_COUNT_MASK (0xFFF000)
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#define SPROXY_THREAD_OFFSET(tid) (0x1000 * (tid))
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#define SPROXY_THREAD_DATA_OFFSET(tid, reg) \
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(SPROXY_THREAD_OFFSET(tid) + ((reg) * 0x4) + 0x4)
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#define SPROXY_THREAD_STATUS_OFFSET(tid) (SPROXY_THREAD_OFFSET(tid))
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#define SPROXY_THREAD_STATUS_COUNT_MASK (0xFF)
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#define SPROXY_THREAD_CTRL_OFFSET(tid) (0x1000 + SPROXY_THREAD_OFFSET(tid))
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#define SPROXY_THREAD_CTRL_DIR_MASK (0x1 << 31)
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/**
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* struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
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* @queue_id: Queue Number for this path
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* @proxy_id: Proxy ID representing the processor in SoC
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* @is_tx: Is this a receive path?
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*/
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struct ti_msgmgr_valid_queue_desc {
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u8 queue_id;
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u8 proxy_id;
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bool is_tx;
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};
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/**
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* struct ti_msgmgr_desc - Description of message manager integration
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* @queue_count: Number of Queues
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* @max_message_size: Message size in bytes
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* @max_messages: Number of messages
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* @data_first_reg: First data register for proxy data region
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* @data_last_reg: Last data register for proxy data region
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* @status_cnt_mask: Mask for getting the status value
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* @status_err_mask: Mask for getting the error value, if applicable
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* @tx_polled: Do I need to use polled mechanism for tx
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* @tx_poll_timeout_ms: Timeout in ms if polled
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* @valid_queues: List of Valid queues that the processor can access
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* @data_region_name: Name of the proxy data region
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* @status_region_name: Name of the proxy status region
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* @ctrl_region_name: Name of the proxy control region
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* @num_valid_queues: Number of valid queues
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* @is_sproxy: Is this an Secure Proxy instance?
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*
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* This structure is used in of match data to describe how integration
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* for a specific compatible SoC is done.
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*/
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struct ti_msgmgr_desc {
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u8 queue_count;
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u8 max_message_size;
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u8 max_messages;
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u8 data_first_reg;
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u8 data_last_reg;
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u32 status_cnt_mask;
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u32 status_err_mask;
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bool tx_polled;
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int tx_poll_timeout_ms;
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const struct ti_msgmgr_valid_queue_desc *valid_queues;
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const char *data_region_name;
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const char *status_region_name;
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const char *ctrl_region_name;
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int num_valid_queues;
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bool is_sproxy;
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};
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/**
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* struct ti_queue_inst - Description of a queue instance
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* @name: Queue Name
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* @queue_id: Queue Identifier as mapped on SoC
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* @proxy_id: Proxy Identifier as mapped on SoC
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* @irq: IRQ for Rx Queue
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* @is_tx: 'true' if transmit queue, else, 'false'
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* @queue_buff_start: First register of Data Buffer
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* @queue_buff_end: Last (or confirmation) register of Data buffer
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* @queue_state: Queue status register
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* @queue_ctrl: Queue Control register
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* @chan: Mailbox channel
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* @rx_buff: Receive buffer pointer allocated at probe, max_message_size
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*/
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struct ti_queue_inst {
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char name[30];
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u8 queue_id;
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u8 proxy_id;
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int irq;
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bool is_tx;
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void __iomem *queue_buff_start;
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void __iomem *queue_buff_end;
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void __iomem *queue_state;
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void __iomem *queue_ctrl;
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struct mbox_chan *chan;
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u32 *rx_buff;
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};
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/**
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* struct ti_msgmgr_inst - Description of a Message Manager Instance
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* @dev: device pointer corresponding to the Message Manager instance
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* @desc: Description of the SoC integration
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* @queue_proxy_region: Queue proxy region where queue buffers are located
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* @queue_state_debug_region: Queue status register regions
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* @queue_ctrl_region: Queue Control register regions
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* @num_valid_queues: Number of valid queues defined for the processor
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* Note: other queues are probably reserved for other processors
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* in the SoC.
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* @qinsts: Array of valid Queue Instances for the Processor
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* @mbox: Mailbox Controller
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* @chans: Array for channels corresponding to the Queue Instances.
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*/
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struct ti_msgmgr_inst {
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struct device *dev;
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const struct ti_msgmgr_desc *desc;
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void __iomem *queue_proxy_region;
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void __iomem *queue_state_debug_region;
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void __iomem *queue_ctrl_region;
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u8 num_valid_queues;
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struct ti_queue_inst *qinsts;
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struct mbox_controller mbox;
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struct mbox_chan *chans;
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};
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/**
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* ti_msgmgr_queue_get_num_messages() - Get the number of pending messages
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* @d: Description of message manager
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* @qinst: Queue instance for which we check the number of pending messages
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*
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* Return: number of messages pending in the queue (0 == no pending messages)
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*/
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static inline int
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ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d,
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struct ti_queue_inst *qinst)
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{
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u32 val;
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u32 status_cnt_mask = d->status_cnt_mask;
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/*
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* We cannot use relaxed operation here - update may happen
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* real-time.
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*/
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val = readl(qinst->queue_state) & status_cnt_mask;
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val >>= __ffs(status_cnt_mask);
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return val;
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}
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/**
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* ti_msgmgr_queue_is_error() - Check to see if there is queue error
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* @d: Description of message manager
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* @qinst: Queue instance for which we check the number of pending messages
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*
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* Return: true if error, else false
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*/
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static inline bool ti_msgmgr_queue_is_error(const struct ti_msgmgr_desc *d,
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struct ti_queue_inst *qinst)
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{
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u32 val;
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/* Msgmgr has no error detection */
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if (!d->is_sproxy)
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return false;
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/*
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* We cannot use relaxed operation here - update may happen
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* real-time.
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*/
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val = readl(qinst->queue_state) & d->status_err_mask;
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return val ? true : false;
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}
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/**
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* ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue
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* @irq: Interrupt number
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* @p: Channel Pointer
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*
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* Return: -EINVAL if there is no instance
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* IRQ_NONE if the interrupt is not ours.
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* IRQ_HANDLED if the rx interrupt was successfully handled.
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*/
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static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p)
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{
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struct mbox_chan *chan = p;
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struct device *dev = chan->mbox->dev;
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struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
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struct ti_queue_inst *qinst = chan->con_priv;
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const struct ti_msgmgr_desc *desc;
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int msg_count, num_words;
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struct ti_msgmgr_message message;
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void __iomem *data_reg;
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u32 *word_data;
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if (WARN_ON(!inst)) {
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dev_err(dev, "no platform drv data??\n");
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return -EINVAL;
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}
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/* Do I have an invalid interrupt source? */
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if (qinst->is_tx) {
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dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n",
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qinst->name);
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return IRQ_NONE;
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}
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desc = inst->desc;
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if (ti_msgmgr_queue_is_error(desc, qinst)) {
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dev_err(dev, "Error on Rx channel %s\n", qinst->name);
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return IRQ_NONE;
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}
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/* Do I actually have messages to read? */
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msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst);
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if (!msg_count) {
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/* Shared IRQ? */
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dev_dbg(dev, "Spurious event - 0 pending data!\n");
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return IRQ_NONE;
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}
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/*
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* I have no idea about the protocol being used to communicate with the
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* remote producer - 0 could be valid data, so I wont make a judgement
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* of how many bytes I should be reading. Let the client figure this
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* out.. I just read the full message and pass it on..
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*/
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message.len = desc->max_message_size;
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message.buf = (u8 *)qinst->rx_buff;
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/*
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* NOTE about register access involved here:
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* the hardware block is implemented with 32bit access operations and no
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* support for data splitting. We don't want the hardware to misbehave
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* with sub 32bit access - For example: if the last register read is
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* split into byte wise access, it can result in the queue getting
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* stuck or indeterminate behavior. An out of order read operation may
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* result in weird data results as well.
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* Hence, we do not use memcpy_fromio or __ioread32_copy here, instead
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* we depend on readl for the purpose.
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*
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* Also note that the final register read automatically marks the
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* queue message as read.
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*/
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for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff,
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num_words = (desc->max_message_size / sizeof(u32));
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num_words; num_words--, data_reg += sizeof(u32), word_data++)
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*word_data = readl(data_reg);
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/*
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* Last register read automatically clears the IRQ if only 1 message
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* is pending - so send the data up the stack..
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* NOTE: Client is expected to be as optimal as possible, since
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* we invoke the handler in IRQ context.
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*/
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mbox_chan_received_data(chan, (void *)&message);
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return IRQ_HANDLED;
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}
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/**
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* ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages.
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* @chan: Channel Pointer
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*
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* Return: 'true' if there is pending rx data, 'false' if there is none.
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*/
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static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan)
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{
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struct ti_queue_inst *qinst = chan->con_priv;
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struct device *dev = chan->mbox->dev;
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struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
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const struct ti_msgmgr_desc *desc = inst->desc;
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int msg_count;
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if (qinst->is_tx)
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return false;
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if (ti_msgmgr_queue_is_error(desc, qinst)) {
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dev_err(dev, "Error on channel %s\n", qinst->name);
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return false;
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}
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msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst);
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return msg_count ? true : false;
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}
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/**
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* ti_msgmgr_last_tx_done() - See if all the tx messages are sent
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* @chan: Channel pointer
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*
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* Return: 'true' is no pending tx data, 'false' if there are any.
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*/
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static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan)
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{
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struct ti_queue_inst *qinst = chan->con_priv;
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struct device *dev = chan->mbox->dev;
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struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
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const struct ti_msgmgr_desc *desc = inst->desc;
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int msg_count;
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if (!qinst->is_tx)
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return false;
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if (ti_msgmgr_queue_is_error(desc, qinst)) {
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dev_err(dev, "Error on channel %s\n", qinst->name);
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return false;
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}
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msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst);
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if (desc->is_sproxy) {
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/* In secure proxy, msg_count indicates how many we can send */
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return msg_count ? true : false;
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}
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/* if we have any messages pending.. */
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return msg_count ? false : true;
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}
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/**
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* ti_msgmgr_send_data() - Send data
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* @chan: Channel Pointer
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* @data: ti_msgmgr_message * Message Pointer
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*
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* Return: 0 if all goes good, else appropriate error messages.
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*/
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static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data)
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{
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struct device *dev = chan->mbox->dev;
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struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
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const struct ti_msgmgr_desc *desc;
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struct ti_queue_inst *qinst = chan->con_priv;
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int num_words, trail_bytes;
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struct ti_msgmgr_message *message = data;
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void __iomem *data_reg;
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u32 *word_data;
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if (WARN_ON(!inst)) {
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dev_err(dev, "no platform drv data??\n");
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return -EINVAL;
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}
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desc = inst->desc;
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if (ti_msgmgr_queue_is_error(desc, qinst)) {
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dev_err(dev, "Error on channel %s\n", qinst->name);
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return false;
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}
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if (desc->max_message_size < message->len) {
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dev_err(dev, "Queue %s message length %zu > max %d\n",
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qinst->name, message->len, desc->max_message_size);
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return -EINVAL;
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}
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/* NOTE: Constraints similar to rx path exists here as well */
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for (data_reg = qinst->queue_buff_start,
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num_words = message->len / sizeof(u32),
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word_data = (u32 *)message->buf;
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num_words; num_words--, data_reg += sizeof(u32), word_data++)
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writel(*word_data, data_reg);
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trail_bytes = message->len % sizeof(u32);
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if (trail_bytes) {
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u32 data_trail = *word_data;
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/* Ensure all unused data is 0 */
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data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes));
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writel(data_trail, data_reg);
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data_reg++;
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}
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/*
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* 'data_reg' indicates next register to write. If we did not already
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* write on tx complete reg(last reg), we must do so for transmit
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*/
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if (data_reg <= qinst->queue_buff_end)
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writel(0, qinst->queue_buff_end);
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return 0;
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}
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/**
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* ti_msgmgr_queue_rx_irq_req() - RX IRQ request
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* @dev: device pointer
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* @d: descriptor for ti_msgmgr
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* @qinst: Queue instance
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* @chan: Channel pointer
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*/
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static int ti_msgmgr_queue_rx_irq_req(struct device *dev,
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const struct ti_msgmgr_desc *d,
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struct ti_queue_inst *qinst,
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struct mbox_chan *chan)
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{
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int ret = 0;
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char of_rx_irq_name[7];
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struct device_node *np;
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snprintf(of_rx_irq_name, sizeof(of_rx_irq_name),
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"rx_%03d", d->is_sproxy ? qinst->proxy_id : qinst->queue_id);
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/* Get the IRQ if not found */
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if (qinst->irq < 0) {
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np = of_node_get(dev->of_node);
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if (!np)
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return -ENODATA;
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qinst->irq = of_irq_get_byname(np, of_rx_irq_name);
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of_node_put(np);
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if (qinst->irq < 0) {
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dev_err(dev,
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"QID %d PID %d:No IRQ[%s]: %d\n",
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qinst->queue_id, qinst->proxy_id,
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of_rx_irq_name, qinst->irq);
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return qinst->irq;
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}
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}
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/* With the expectation that the IRQ might be shared in SoC */
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ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt,
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IRQF_SHARED, qinst->name, chan);
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if (ret) {
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dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n",
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qinst->irq, qinst->name, ret);
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}
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return ret;
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}
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/**
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* ti_msgmgr_queue_startup() - Startup queue
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* @chan: Channel pointer
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*
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* Return: 0 if all goes good, else return corresponding error message
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*/
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static int ti_msgmgr_queue_startup(struct mbox_chan *chan)
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{
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struct device *dev = chan->mbox->dev;
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struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
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struct ti_queue_inst *qinst = chan->con_priv;
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const struct ti_msgmgr_desc *d = inst->desc;
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int ret;
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int msg_count;
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/*
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* If sproxy is starting and can send messages, we are a Tx thread,
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* else Rx
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*/
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if (d->is_sproxy) {
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qinst->is_tx = (readl(qinst->queue_ctrl) &
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SPROXY_THREAD_CTRL_DIR_MASK) ? false : true;
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|
|
|
msg_count = ti_msgmgr_queue_get_num_messages(d, qinst);
|
|
|
|
if (!msg_count && qinst->is_tx) {
|
|
dev_err(dev, "%s: Cannot transmit with 0 credits!\n",
|
|
qinst->name);
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
if (!qinst->is_tx) {
|
|
/* Allocate usage buffer for rx */
|
|
qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL);
|
|
if (!qinst->rx_buff)
|
|
return -ENOMEM;
|
|
/* Request IRQ */
|
|
ret = ti_msgmgr_queue_rx_irq_req(dev, d, qinst, chan);
|
|
if (ret) {
|
|
kfree(qinst->rx_buff);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* ti_msgmgr_queue_shutdown() - Shutdown the queue
|
|
* @chan: Channel pointer
|
|
*/
|
|
static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan)
|
|
{
|
|
struct ti_queue_inst *qinst = chan->con_priv;
|
|
|
|
if (!qinst->is_tx) {
|
|
free_irq(qinst->irq, chan);
|
|
kfree(qinst->rx_buff);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* ti_msgmgr_of_xlate() - Translation of phandle to queue
|
|
* @mbox: Mailbox controller
|
|
* @p: phandle pointer
|
|
*
|
|
* Return: Mailbox channel corresponding to the queue, else return error
|
|
* pointer.
|
|
*/
|
|
static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox,
|
|
const struct of_phandle_args *p)
|
|
{
|
|
struct ti_msgmgr_inst *inst;
|
|
int req_qid, req_pid;
|
|
struct ti_queue_inst *qinst;
|
|
const struct ti_msgmgr_desc *d;
|
|
int i, ncells;
|
|
|
|
inst = container_of(mbox, struct ti_msgmgr_inst, mbox);
|
|
if (WARN_ON(!inst))
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
d = inst->desc;
|
|
|
|
if (d->is_sproxy)
|
|
ncells = 1;
|
|
else
|
|
ncells = 2;
|
|
if (p->args_count != ncells) {
|
|
dev_err(inst->dev, "Invalid arguments in dt[%d]. Must be %d\n",
|
|
p->args_count, ncells);
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
if (ncells == 1) {
|
|
req_qid = 0;
|
|
req_pid = p->args[0];
|
|
} else {
|
|
req_qid = p->args[0];
|
|
req_pid = p->args[1];
|
|
}
|
|
|
|
if (d->is_sproxy) {
|
|
if (req_pid > d->num_valid_queues)
|
|
goto err;
|
|
qinst = &inst->qinsts[req_pid];
|
|
return qinst->chan;
|
|
}
|
|
|
|
for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues;
|
|
i++, qinst++) {
|
|
if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id)
|
|
return qinst->chan;
|
|
}
|
|
|
|
err:
|
|
dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %s\n",
|
|
req_qid, req_pid, p->np->name);
|
|
return ERR_PTR(-ENOENT);
|
|
}
|
|
|
|
/**
|
|
* ti_msgmgr_queue_setup() - Setup data structures for each queue instance
|
|
* @idx: index of the queue
|
|
* @dev: pointer to the message manager device
|
|
* @np: pointer to the of node
|
|
* @inst: Queue instance pointer
|
|
* @d: Message Manager instance description data
|
|
* @qd: Queue description data
|
|
* @qinst: Queue instance pointer
|
|
* @chan: pointer to mailbox channel
|
|
*
|
|
* Return: 0 if all went well, else return corresponding error
|
|
*/
|
|
static int ti_msgmgr_queue_setup(int idx, struct device *dev,
|
|
struct device_node *np,
|
|
struct ti_msgmgr_inst *inst,
|
|
const struct ti_msgmgr_desc *d,
|
|
const struct ti_msgmgr_valid_queue_desc *qd,
|
|
struct ti_queue_inst *qinst,
|
|
struct mbox_chan *chan)
|
|
{
|
|
char *dir;
|
|
|
|
qinst->proxy_id = qd->proxy_id;
|
|
qinst->queue_id = qd->queue_id;
|
|
|
|
if (qinst->queue_id > d->queue_count) {
|
|
dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n",
|
|
idx, qinst->queue_id, d->queue_count);
|
|
return -ERANGE;
|
|
}
|
|
|
|
if (d->is_sproxy) {
|
|
qinst->queue_buff_start = inst->queue_proxy_region +
|
|
SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id,
|
|
d->data_first_reg);
|
|
qinst->queue_buff_end = inst->queue_proxy_region +
|
|
SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id,
|
|
d->data_last_reg);
|
|
qinst->queue_state = inst->queue_state_debug_region +
|
|
SPROXY_THREAD_STATUS_OFFSET(qinst->proxy_id);
|
|
qinst->queue_ctrl = inst->queue_ctrl_region +
|
|
SPROXY_THREAD_CTRL_OFFSET(qinst->proxy_id);
|
|
|
|
/* XXX: DONOT read registers here!.. Some may be unusable */
|
|
dir = "thr";
|
|
snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d",
|
|
dev_name(dev), dir, qinst->proxy_id);
|
|
} else {
|
|
qinst->queue_buff_start = inst->queue_proxy_region +
|
|
Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id,
|
|
d->data_first_reg);
|
|
qinst->queue_buff_end = inst->queue_proxy_region +
|
|
Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id,
|
|
d->data_last_reg);
|
|
qinst->queue_state =
|
|
inst->queue_state_debug_region +
|
|
Q_STATE_OFFSET(qinst->queue_id);
|
|
qinst->is_tx = qd->is_tx;
|
|
dir = qinst->is_tx ? "tx" : "rx";
|
|
snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d",
|
|
dev_name(dev), dir, qinst->queue_id, qinst->proxy_id);
|
|
}
|
|
|
|
qinst->chan = chan;
|
|
|
|
/* Setup an error value for IRQ - Lazy allocation */
|
|
qinst->irq = -EINVAL;
|
|
|
|
chan->con_priv = qinst;
|
|
|
|
dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n",
|
|
idx, qinst->queue_id, qinst->proxy_id, qinst->irq,
|
|
qinst->queue_buff_start, qinst->queue_buff_end);
|
|
return 0;
|
|
}
|
|
|
|
/* Queue operations */
|
|
static const struct mbox_chan_ops ti_msgmgr_chan_ops = {
|
|
.startup = ti_msgmgr_queue_startup,
|
|
.shutdown = ti_msgmgr_queue_shutdown,
|
|
.peek_data = ti_msgmgr_queue_peek_data,
|
|
.last_tx_done = ti_msgmgr_last_tx_done,
|
|
.send_data = ti_msgmgr_send_data,
|
|
};
|
|
|
|
/* Keystone K2G SoC integration details */
|
|
static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = {
|
|
{.queue_id = 0, .proxy_id = 0, .is_tx = true,},
|
|
{.queue_id = 1, .proxy_id = 0, .is_tx = true,},
|
|
{.queue_id = 2, .proxy_id = 0, .is_tx = true,},
|
|
{.queue_id = 3, .proxy_id = 0, .is_tx = true,},
|
|
{.queue_id = 5, .proxy_id = 2, .is_tx = false,},
|
|
{.queue_id = 56, .proxy_id = 1, .is_tx = true,},
|
|
{.queue_id = 57, .proxy_id = 2, .is_tx = false,},
|
|
{.queue_id = 58, .proxy_id = 3, .is_tx = true,},
|
|
{.queue_id = 59, .proxy_id = 4, .is_tx = true,},
|
|
{.queue_id = 60, .proxy_id = 5, .is_tx = true,},
|
|
{.queue_id = 61, .proxy_id = 6, .is_tx = true,},
|
|
};
|
|
|
|
static const struct ti_msgmgr_desc k2g_desc = {
|
|
.queue_count = 64,
|
|
.max_message_size = 64,
|
|
.max_messages = 128,
|
|
.data_region_name = "queue_proxy_region",
|
|
.status_region_name = "queue_state_debug_region",
|
|
.data_first_reg = 16,
|
|
.data_last_reg = 31,
|
|
.status_cnt_mask = Q_STATE_ENTRY_COUNT_MASK,
|
|
.tx_polled = false,
|
|
.valid_queues = k2g_valid_queues,
|
|
.num_valid_queues = ARRAY_SIZE(k2g_valid_queues),
|
|
.is_sproxy = false,
|
|
};
|
|
|
|
static const struct ti_msgmgr_desc am654_desc = {
|
|
.queue_count = 190,
|
|
.num_valid_queues = 190,
|
|
.max_message_size = 60,
|
|
.data_region_name = "target_data",
|
|
.status_region_name = "rt",
|
|
.ctrl_region_name = "scfg",
|
|
.data_first_reg = 0,
|
|
.data_last_reg = 14,
|
|
.status_cnt_mask = SPROXY_THREAD_STATUS_COUNT_MASK,
|
|
.tx_polled = false,
|
|
.is_sproxy = true,
|
|
};
|
|
|
|
static const struct of_device_id ti_msgmgr_of_match[] = {
|
|
{.compatible = "ti,k2g-message-manager", .data = &k2g_desc},
|
|
{.compatible = "ti,am654-secure-proxy", .data = &am654_desc},
|
|
{ /* Sentinel */ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match);
|
|
|
|
static int ti_msgmgr_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
const struct of_device_id *of_id;
|
|
struct device_node *np;
|
|
struct resource *res;
|
|
const struct ti_msgmgr_desc *desc;
|
|
struct ti_msgmgr_inst *inst;
|
|
struct ti_queue_inst *qinst;
|
|
struct mbox_controller *mbox;
|
|
struct mbox_chan *chans;
|
|
int queue_count;
|
|
int i;
|
|
int ret = -EINVAL;
|
|
const struct ti_msgmgr_valid_queue_desc *queue_desc;
|
|
|
|
if (!dev->of_node) {
|
|
dev_err(dev, "no OF information\n");
|
|
return -EINVAL;
|
|
}
|
|
np = dev->of_node;
|
|
|
|
of_id = of_match_device(ti_msgmgr_of_match, dev);
|
|
if (!of_id) {
|
|
dev_err(dev, "OF data missing\n");
|
|
return -EINVAL;
|
|
}
|
|
desc = of_id->data;
|
|
|
|
inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL);
|
|
if (!inst)
|
|
return -ENOMEM;
|
|
|
|
inst->dev = dev;
|
|
inst->desc = desc;
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
desc->data_region_name);
|
|
inst->queue_proxy_region = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(inst->queue_proxy_region))
|
|
return PTR_ERR(inst->queue_proxy_region);
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
desc->status_region_name);
|
|
inst->queue_state_debug_region = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(inst->queue_state_debug_region))
|
|
return PTR_ERR(inst->queue_state_debug_region);
|
|
|
|
if (desc->is_sproxy) {
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
desc->ctrl_region_name);
|
|
inst->queue_ctrl_region = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(inst->queue_ctrl_region))
|
|
return PTR_ERR(inst->queue_ctrl_region);
|
|
}
|
|
|
|
dev_dbg(dev, "proxy region=%p, queue_state=%p\n",
|
|
inst->queue_proxy_region, inst->queue_state_debug_region);
|
|
|
|
queue_count = desc->num_valid_queues;
|
|
if (!queue_count || queue_count > desc->queue_count) {
|
|
dev_crit(dev, "Invalid Number of queues %d. Max %d\n",
|
|
queue_count, desc->queue_count);
|
|
return -ERANGE;
|
|
}
|
|
inst->num_valid_queues = queue_count;
|
|
|
|
qinst = devm_kcalloc(dev, queue_count, sizeof(*qinst), GFP_KERNEL);
|
|
if (!qinst)
|
|
return -ENOMEM;
|
|
inst->qinsts = qinst;
|
|
|
|
chans = devm_kcalloc(dev, queue_count, sizeof(*chans), GFP_KERNEL);
|
|
if (!chans)
|
|
return -ENOMEM;
|
|
inst->chans = chans;
|
|
|
|
if (desc->is_sproxy) {
|
|
struct ti_msgmgr_valid_queue_desc sproxy_desc;
|
|
|
|
/* All proxies may be valid in Secure Proxy instance */
|
|
for (i = 0; i < queue_count; i++, qinst++, chans++) {
|
|
sproxy_desc.queue_id = 0;
|
|
sproxy_desc.proxy_id = i;
|
|
ret = ti_msgmgr_queue_setup(i, dev, np, inst,
|
|
desc, &sproxy_desc, qinst,
|
|
chans);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
} else {
|
|
/* Only Some proxies are valid in Message Manager */
|
|
for (i = 0, queue_desc = desc->valid_queues;
|
|
i < queue_count; i++, qinst++, chans++, queue_desc++) {
|
|
ret = ti_msgmgr_queue_setup(i, dev, np, inst,
|
|
desc, queue_desc, qinst,
|
|
chans);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
mbox = &inst->mbox;
|
|
mbox->dev = dev;
|
|
mbox->ops = &ti_msgmgr_chan_ops;
|
|
mbox->chans = inst->chans;
|
|
mbox->num_chans = inst->num_valid_queues;
|
|
mbox->txdone_irq = false;
|
|
mbox->txdone_poll = desc->tx_polled;
|
|
if (desc->tx_polled)
|
|
mbox->txpoll_period = desc->tx_poll_timeout_ms;
|
|
mbox->of_xlate = ti_msgmgr_of_xlate;
|
|
|
|
platform_set_drvdata(pdev, inst);
|
|
ret = mbox_controller_register(mbox);
|
|
if (ret)
|
|
dev_err(dev, "Failed to register mbox_controller(%d)\n", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ti_msgmgr_remove(struct platform_device *pdev)
|
|
{
|
|
struct ti_msgmgr_inst *inst;
|
|
|
|
inst = platform_get_drvdata(pdev);
|
|
mbox_controller_unregister(&inst->mbox);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver ti_msgmgr_driver = {
|
|
.probe = ti_msgmgr_probe,
|
|
.remove = ti_msgmgr_remove,
|
|
.driver = {
|
|
.name = "ti-msgmgr",
|
|
.of_match_table = of_match_ptr(ti_msgmgr_of_match),
|
|
},
|
|
};
|
|
module_platform_driver(ti_msgmgr_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("TI message manager driver");
|
|
MODULE_AUTHOR("Nishanth Menon");
|
|
MODULE_ALIAS("platform:ti-msgmgr");
|