d9152161b4
DWC3 glue layer is hardware layer around Synopsys DesignWare USB3 core. Its purpose is to supply Synopsys IP with required clocks, voltages and interface it with the rest of the SoC. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
121 lines
3.3 KiB
Plaintext
121 lines
3.3 KiB
Plaintext
config USB_DWC3
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tristate "DesignWare USB3 DRD Core Support"
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depends on (USB || USB_GADGET) && HAS_DMA
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select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
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help
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Say Y or M here if your system has a Dual Role SuperSpeed
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USB controller based on the DesignWare USB3 IP Core.
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If you choose to build this driver is a dynamically linked
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module, the module will be called dwc3.ko.
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if USB_DWC3
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choice
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bool "DWC3 Mode Selection"
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default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
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default USB_DWC3_HOST if (USB && !USB_GADGET)
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default USB_DWC3_GADGET if (!USB && USB_GADGET)
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config USB_DWC3_HOST
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bool "Host only mode"
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depends on USB=y || USB=USB_DWC3
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help
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Select this when you want to use DWC3 in host mode only,
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thereby the gadget feature will be regressed.
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config USB_DWC3_GADGET
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bool "Gadget only mode"
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depends on USB_GADGET=y || USB_GADGET=USB_DWC3
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help
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Select this when you want to use DWC3 in gadget mode only,
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thereby the host feature will be regressed.
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config USB_DWC3_DUAL_ROLE
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bool "Dual Role mode"
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depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
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help
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This is the default mode of working of DWC3 controller where
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both host and gadget features are enabled.
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endchoice
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comment "Platform Glue Driver Support"
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config USB_DWC3_OMAP
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tristate "Texas Instruments OMAP5 and similar Platforms"
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depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
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depends on OF
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default USB_DWC3
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help
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Some platforms from Texas Instruments like OMAP5, DRA7xxx and
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AM437x use this IP for USB2/3 functionality.
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Say 'Y' or 'M' here if you have one such device
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config USB_DWC3_EXYNOS
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tristate "Samsung Exynos Platform"
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depends on ARCH_EXYNOS || COMPILE_TEST
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default USB_DWC3
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help
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Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
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say 'Y' or 'M' if you have one such device.
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config USB_DWC3_PCI
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tristate "PCIe-based Platforms"
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depends on PCI
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default USB_DWC3
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help
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If you're using the DesignWare Core IP with a PCIe, please say
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'Y' or 'M' here.
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One such PCIe-based platform is Synopsys' PCIe HAPS model of
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this IP.
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config USB_DWC3_KEYSTONE
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tristate "Texas Instruments Keystone2 Platforms"
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depends on ARCH_KEYSTONE || COMPILE_TEST
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default USB_DWC3
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help
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Support of USB2/3 functionality in TI Keystone2 platforms.
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Say 'Y' or 'M' here if you have one such device
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config USB_DWC3_ST
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tristate "STMicroelectronics Platforms"
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depends on ARCH_STI && OF
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default USB_DWC3
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help
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STMicroelectronics SoCs with one DesignWare Core USB3 IP
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inside (i.e. STiH407).
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Say 'Y' or 'M' if you have one such device.
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config USB_DWC3_QCOM
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tristate "Qualcomm Platforms"
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depends on ARCH_QCOM || COMPILE_TEST
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default USB_DWC3
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help
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Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
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say 'Y' or 'M' if you have one such device.
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comment "Debugging features"
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config USB_DWC3_DEBUG
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bool "Enable Debugging Messages"
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help
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Say Y here to enable debugging messages on DWC3 Driver.
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config USB_DWC3_VERBOSE
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bool "Enable Verbose Debugging Messages"
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depends on USB_DWC3_DEBUG
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help
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Say Y here to enable verbose debugging messages on DWC3 Driver.
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config DWC3_HOST_USB3_LPM_ENABLE
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bool "Enable USB3 LPM Capability"
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depends on USB_DWC3_HOST=y || USB_DWC3_DUAL_ROLE=y
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default n
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help
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Select this when you want to enable USB3 LPM with dwc3 xhci host.
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endif
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