59 lines
2.0 KiB
Plaintext
59 lines
2.0 KiB
Plaintext
NXP Display Mix clk-en Reset Controller
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=======================================
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This binding describes a reset controller device that is used to enable
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or disable the internal clocks for all the submodules(such as, LCDIF,
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MIPI DSI, MIPI CSI, ISI and etc) included by the Display Mix subsystem
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on IMX8MM and IMX8MN platforms. Like sft-rstn, only assert and deassert
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functions are required for submodule internal clocks enable or disable,
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that means the clk-en can be treated as a real reset controller.
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Please also refer to reset.txt in this directory for common reset
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controller binding usage.
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Required properties:
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- compatible: Should be "fsl,imx8mm-dispmix-clk-en" or
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"fsl,imx8mn-dispmix-clk-en".
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- reg: should be register base and length as documented in the datasheet.
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- clocks: phandle and clock specifier to disp apb clock for register access.
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- clock-names: should be "disp-apb".
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- power-domains: phandle to dispmix power domain.
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- reset-cells: 1, see below.
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example:
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dispmix_clk_en: dispmix-clk-en@32e28004 {
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compatible = "fsl,imx8mn-dispmix-clk-en";
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reg = <0x0 0x32e28004 0x0 0x4>;
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clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>;
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clock-names = "disp-apb";
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power-domains = <&dispmix_pd>;
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#reset-cells = <1>;
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};
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Specifying clk-en control of devices
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====================================
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Device nodes in Display Mix should specify the reset channel required in
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their "resets" property, containing a phandle to the clk-en device node
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and an index to specify which channel to use, as described in
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Documentation/devicetree/bindings/reset/reset.txt.
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example:
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lcdif_resets: lcdif-resets {
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#address-cells = <1>;
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#size-cells = <0>;
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#reset-cells = <0>;
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lcdif-clk-enable {
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compatible = "lcdif,clk-enable";
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resets = <&dispmix_clk_en IMX8MN_LCDIF_APB_CLK_EN>,
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<&dispmix_clk_en IMX8MN_LCDIF_PIXEL_CLK_EN>;
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};
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};
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Macro definitions for the supported reset channels can be found in:
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include/dt-bindings/reset/imx8mm-dispmix.h and
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include/dt-bindings/reset/imx8mn-dispmix.h.
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