bf726b1c86
Add support for digital volume control. There is no dedicated register for volume control but instead there are 4. The values of the registers are determined with exponential floating point math. So a table was created with register values for 2dB step increments from -110dB to 0dB. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200221124151.8774-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
88 lines
2.9 KiB
C
88 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* tas2562.h - ALSA SoC Texas Instruments TAS2562 Mono Audio Amplifier
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*
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* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
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*
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* Author: Dan Murphy <dmurphy@ti.com>
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*/
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#ifndef __TAS2562_H__
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#define __TAS2562_H__
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#define TAS2562_PAGE_CTRL 0x00
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#define TAS2562_REG(page, reg) ((page * 128) + reg)
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#define TAS2562_SW_RESET TAS2562_REG(0, 0x01)
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#define TAS2562_PWR_CTRL TAS2562_REG(0, 0x02)
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#define TAS2562_PB_CFG1 TAS2562_REG(0, 0x03)
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#define TAS2562_MISC_CFG1 TAS2562_REG(0, 0x04)
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#define TAS2562_MISC_CFG2 TAS2562_REG(0, 0x05)
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#define TAS2562_TDM_CFG0 TAS2562_REG(0, 0x06)
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#define TAS2562_TDM_CFG1 TAS2562_REG(0, 0x07)
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#define TAS2562_TDM_CFG2 TAS2562_REG(0, 0x08)
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#define TAS2562_TDM_CFG3 TAS2562_REG(0, 0x09)
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#define TAS2562_TDM_CFG4 TAS2562_REG(0, 0x0a)
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#define TAS2562_TDM_CFG5 TAS2562_REG(0, 0x0b)
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#define TAS2562_TDM_CFG6 TAS2562_REG(0, 0x0c)
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#define TAS2562_TDM_CFG7 TAS2562_REG(0, 0x0d)
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#define TAS2562_TDM_CFG8 TAS2562_REG(0, 0x0e)
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#define TAS2562_TDM_CFG9 TAS2562_REG(0, 0x0f)
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#define TAS2562_TDM_CFG10 TAS2562_REG(0, 0x10)
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#define TAS2562_TDM_DET TAS2562_REG(0, 0x11)
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#define TAS2562_REV_ID TAS2562_REG(0, 0x7d)
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/* Page 2 */
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#define TAS2562_DVC_CFG1 TAS2562_REG(2, 0x0c)
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#define TAS2562_DVC_CFG2 TAS2562_REG(2, 0x0d)
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#define TAS2562_DVC_CFG3 TAS2562_REG(2, 0x0e)
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#define TAS2562_DVC_CFG4 TAS2562_REG(2, 0x0f)
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#define TAS2562_RESET BIT(0)
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#define TAS2562_MODE_MASK GENMASK(1,0)
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#define TAS2562_ACTIVE 0x0
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#define TAS2562_MUTE 0x1
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#define TAS2562_SHUTDOWN 0x2
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#define TAS2562_TDM_CFG1_RX_EDGE_MASK BIT(0)
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#define TAS2562_TDM_CFG1_RX_FALLING 1
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#define TAS2562_TDM_CFG1_RX_OFFSET_MASK GENMASK(4, 0)
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#define TAS2562_TDM_CFG0_RAMPRATE_MASK BIT(5)
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#define TAS2562_TDM_CFG0_RAMPRATE_44_1 BIT(5)
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#define TAS2562_TDM_CFG0_SAMPRATE_MASK GENMASK(3, 1)
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#define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ 0x0
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#define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ 0x1
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#define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ 0x2
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#define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ 0x3
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#define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ 0x4
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#define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ 0x5
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#define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ 0x6
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#define TAS2562_TDM_CFG2_RIGHT_JUSTIFY BIT(6)
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#define TAS2562_TDM_CFG2_RXLEN_MASK GENMASK(1, 0)
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#define TAS2562_TDM_CFG2_RXLEN_16B 0x0
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#define TAS2562_TDM_CFG2_RXLEN_24B BIT(0)
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#define TAS2562_TDM_CFG2_RXLEN_32B BIT(1)
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#define TAS2562_TDM_CFG2_RXWLEN_MASK GENMASK(3, 2)
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#define TAS2562_TDM_CFG2_RXWLEN_16B 0x0
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#define TAS2562_TDM_CFG2_RXWLEN_20B BIT(2)
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#define TAS2562_TDM_CFG2_RXWLEN_24B BIT(3)
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#define TAS2562_TDM_CFG2_RXWLEN_32B (BIT(2) | BIT(3))
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#define TAS2562_VSENSE_POWER_EN 2
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#define TAS2562_ISENSE_POWER_EN 3
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#define TAS2562_TDM_CFG5_VSNS_EN BIT(6)
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#define TAS2562_TDM_CFG5_VSNS_SLOT_MASK GENMASK(5, 0)
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#define TAS2562_TDM_CFG6_ISNS_EN BIT(6)
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#define TAS2562_TDM_CFG6_ISNS_SLOT_MASK GENMASK(5, 0)
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#endif /* __TAS2562_H__ */
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