![Paul Gortmaker](/assets/img/avatar_default.png)
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0
("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
This removes all the powerpc uses of the __cpuinit macros. There
are no __CPUINIT users in assembly files in powerpc.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
460 lines
13 KiB
C
460 lines
13 KiB
C
/*
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* This file contains the routines for handling the MMU on those
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* PowerPC implementations where the MMU is not using the hash
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* table, such as 8xx, 4xx, BookE's etc...
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*
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* Copyright 2008 Ben Herrenschmidt <benh@kernel.crashing.org>
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* IBM Corp.
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*
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* Derived from previous arch/powerpc/mm/mmu_context.c
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* and arch/powerpc/include/asm/mmu_context.h
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* TODO:
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*
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* - The global context lock will not scale very well
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* - The maps should be dynamically allocated to allow for processors
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* that support more PID bits at runtime
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* - Implement flush_tlb_mm() by making the context stale and picking
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* a new one
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* - More aggressively clear stale map bits and maybe find some way to
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* also clear mm->cpu_vm_mask bits when processes are migrated
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*/
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//#define DEBUG_MAP_CONSISTENCY
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//#define DEBUG_CLAMP_LAST_CONTEXT 31
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//#define DEBUG_HARDER
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/* We don't use DEBUG because it tends to be compiled in always nowadays
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* and this would generate way too much output
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*/
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#ifdef DEBUG_HARDER
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#define pr_hard(args...) printk(KERN_DEBUG args)
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#define pr_hardcont(args...) printk(KERN_CONT args)
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#else
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#define pr_hard(args...) do { } while(0)
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#define pr_hardcont(args...) do { } while(0)
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#endif
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/bootmem.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/slab.h>
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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static unsigned int first_context, last_context;
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static unsigned int next_context, nr_free_contexts;
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static unsigned long *context_map;
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static unsigned long *stale_map[NR_CPUS];
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static struct mm_struct **context_mm;
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static DEFINE_RAW_SPINLOCK(context_lock);
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#define CTX_MAP_SIZE \
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(sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1))
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/* Steal a context from a task that has one at the moment.
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*
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* This is used when we are running out of available PID numbers
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* on the processors.
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*
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* This isn't an LRU system, it just frees up each context in
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* turn (sort-of pseudo-random replacement :). This would be the
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* place to implement an LRU scheme if anyone was motivated to do it.
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* -- paulus
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*
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* For context stealing, we use a slightly different approach for
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* SMP and UP. Basically, the UP one is simpler and doesn't use
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* the stale map as we can just flush the local CPU
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* -- benh
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*/
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#ifdef CONFIG_SMP
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static unsigned int steal_context_smp(unsigned int id)
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{
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struct mm_struct *mm;
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unsigned int cpu, max, i;
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max = last_context - first_context;
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/* Attempt to free next_context first and then loop until we manage */
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while (max--) {
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/* Pick up the victim mm */
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mm = context_mm[id];
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/* We have a candidate victim, check if it's active, on SMP
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* we cannot steal active contexts
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*/
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if (mm->context.active) {
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id++;
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if (id > last_context)
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id = first_context;
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continue;
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}
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pr_hardcont(" | steal %d from 0x%p", id, mm);
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/* Mark this mm has having no context anymore */
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mm->context.id = MMU_NO_CONTEXT;
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/* Mark it stale on all CPUs that used this mm. For threaded
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* implementations, we set it on all threads on each core
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* represented in the mask. A future implementation will use
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* a core map instead but this will do for now.
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*/
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for_each_cpu(cpu, mm_cpumask(mm)) {
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for (i = cpu_first_thread_sibling(cpu);
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i <= cpu_last_thread_sibling(cpu); i++) {
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if (stale_map[i])
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__set_bit(id, stale_map[i]);
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}
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cpu = i - 1;
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}
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return id;
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}
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/* This will happen if you have more CPUs than available contexts,
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* all we can do here is wait a bit and try again
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*/
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raw_spin_unlock(&context_lock);
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cpu_relax();
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raw_spin_lock(&context_lock);
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/* This will cause the caller to try again */
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return MMU_NO_CONTEXT;
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}
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#endif /* CONFIG_SMP */
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/* Note that this will also be called on SMP if all other CPUs are
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* offlined, which means that it may be called for cpu != 0. For
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* this to work, we somewhat assume that CPUs that are onlined
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* come up with a fully clean TLB (or are cleaned when offlined)
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*/
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static unsigned int steal_context_up(unsigned int id)
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{
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struct mm_struct *mm;
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int cpu = smp_processor_id();
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/* Pick up the victim mm */
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mm = context_mm[id];
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pr_hardcont(" | steal %d from 0x%p", id, mm);
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/* Flush the TLB for that context */
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local_flush_tlb_mm(mm);
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/* Mark this mm has having no context anymore */
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mm->context.id = MMU_NO_CONTEXT;
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/* XXX This clear should ultimately be part of local_flush_tlb_mm */
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__clear_bit(id, stale_map[cpu]);
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return id;
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}
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#ifdef DEBUG_MAP_CONSISTENCY
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static void context_check_map(void)
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{
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unsigned int id, nrf, nact;
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nrf = nact = 0;
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for (id = first_context; id <= last_context; id++) {
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int used = test_bit(id, context_map);
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if (!used)
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nrf++;
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if (used != (context_mm[id] != NULL))
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pr_err("MMU: Context %d is %s and MM is %p !\n",
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id, used ? "used" : "free", context_mm[id]);
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if (context_mm[id] != NULL)
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nact += context_mm[id]->context.active;
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}
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if (nrf != nr_free_contexts) {
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pr_err("MMU: Free context count out of sync ! (%d vs %d)\n",
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nr_free_contexts, nrf);
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nr_free_contexts = nrf;
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}
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if (nact > num_online_cpus())
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pr_err("MMU: More active contexts than CPUs ! (%d vs %d)\n",
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nact, num_online_cpus());
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if (first_context > 0 && !test_bit(0, context_map))
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pr_err("MMU: Context 0 has been freed !!!\n");
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}
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#else
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static void context_check_map(void) { }
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#endif
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void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
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{
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unsigned int i, id, cpu = smp_processor_id();
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unsigned long *map;
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/* No lockless fast path .. yet */
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raw_spin_lock(&context_lock);
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pr_hard("[%d] activating context for mm @%p, active=%d, id=%d",
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cpu, next, next->context.active, next->context.id);
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#ifdef CONFIG_SMP
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/* Mark us active and the previous one not anymore */
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next->context.active++;
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if (prev) {
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pr_hardcont(" (old=0x%p a=%d)", prev, prev->context.active);
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WARN_ON(prev->context.active < 1);
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prev->context.active--;
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}
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again:
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#endif /* CONFIG_SMP */
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/* If we already have a valid assigned context, skip all that */
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id = next->context.id;
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if (likely(id != MMU_NO_CONTEXT)) {
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#ifdef DEBUG_MAP_CONSISTENCY
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if (context_mm[id] != next)
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pr_err("MMU: mm 0x%p has id %d but context_mm[%d] says 0x%p\n",
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next, id, id, context_mm[id]);
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#endif
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goto ctxt_ok;
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}
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/* We really don't have a context, let's try to acquire one */
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id = next_context;
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if (id > last_context)
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id = first_context;
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map = context_map;
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/* No more free contexts, let's try to steal one */
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if (nr_free_contexts == 0) {
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#ifdef CONFIG_SMP
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if (num_online_cpus() > 1) {
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id = steal_context_smp(id);
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if (id == MMU_NO_CONTEXT)
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goto again;
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goto stolen;
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}
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#endif /* CONFIG_SMP */
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id = steal_context_up(id);
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goto stolen;
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}
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nr_free_contexts--;
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/* We know there's at least one free context, try to find it */
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while (__test_and_set_bit(id, map)) {
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id = find_next_zero_bit(map, last_context+1, id);
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if (id > last_context)
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id = first_context;
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}
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stolen:
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next_context = id + 1;
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context_mm[id] = next;
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next->context.id = id;
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pr_hardcont(" | new id=%d,nrf=%d", id, nr_free_contexts);
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context_check_map();
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ctxt_ok:
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/* If that context got marked stale on this CPU, then flush the
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* local TLB for it and unmark it before we use it
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*/
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if (test_bit(id, stale_map[cpu])) {
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pr_hardcont(" | stale flush %d [%d..%d]",
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id, cpu_first_thread_sibling(cpu),
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cpu_last_thread_sibling(cpu));
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local_flush_tlb_mm(next);
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/* XXX This clear should ultimately be part of local_flush_tlb_mm */
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for (i = cpu_first_thread_sibling(cpu);
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i <= cpu_last_thread_sibling(cpu); i++) {
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if (stale_map[i])
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__clear_bit(id, stale_map[i]);
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}
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}
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/* Flick the MMU and release lock */
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pr_hardcont(" -> %d\n", id);
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set_context(id, next->pgd);
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raw_spin_unlock(&context_lock);
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}
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/*
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* Set up the context for a new address space.
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*/
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int init_new_context(struct task_struct *t, struct mm_struct *mm)
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{
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pr_hard("initing context for mm @%p\n", mm);
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mm->context.id = MMU_NO_CONTEXT;
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mm->context.active = 0;
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#ifdef CONFIG_PPC_MM_SLICES
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if (slice_mm_new_context(mm))
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slice_set_user_psize(mm, mmu_virtual_psize);
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#endif
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return 0;
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}
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/*
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* We're finished using the context for an address space.
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*/
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void destroy_context(struct mm_struct *mm)
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{
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unsigned long flags;
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unsigned int id;
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if (mm->context.id == MMU_NO_CONTEXT)
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return;
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WARN_ON(mm->context.active != 0);
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raw_spin_lock_irqsave(&context_lock, flags);
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id = mm->context.id;
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if (id != MMU_NO_CONTEXT) {
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__clear_bit(id, context_map);
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mm->context.id = MMU_NO_CONTEXT;
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#ifdef DEBUG_MAP_CONSISTENCY
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mm->context.active = 0;
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#endif
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context_mm[id] = NULL;
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nr_free_contexts++;
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}
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raw_spin_unlock_irqrestore(&context_lock, flags);
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}
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#ifdef CONFIG_SMP
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static int mmu_context_cpu_notify(struct notifier_block *self,
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unsigned long action, void *hcpu)
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{
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unsigned int cpu = (unsigned int)(long)hcpu;
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/* We don't touch CPU 0 map, it's allocated at aboot and kept
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* around forever
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*/
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if (cpu == boot_cpuid)
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return NOTIFY_OK;
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switch (action) {
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case CPU_UP_PREPARE:
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case CPU_UP_PREPARE_FROZEN:
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pr_devel("MMU: Allocating stale context map for CPU %d\n", cpu);
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stale_map[cpu] = kzalloc(CTX_MAP_SIZE, GFP_KERNEL);
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break;
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#ifdef CONFIG_HOTPLUG_CPU
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case CPU_UP_CANCELED:
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case CPU_UP_CANCELED_FROZEN:
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case CPU_DEAD:
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case CPU_DEAD_FROZEN:
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pr_devel("MMU: Freeing stale context map for CPU %d\n", cpu);
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kfree(stale_map[cpu]);
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stale_map[cpu] = NULL;
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/* We also clear the cpu_vm_mask bits of CPUs going away */
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clear_tasks_mm_cpumask(cpu);
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break;
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#endif /* CONFIG_HOTPLUG_CPU */
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}
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return NOTIFY_OK;
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}
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static struct notifier_block mmu_context_cpu_nb = {
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.notifier_call = mmu_context_cpu_notify,
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};
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#endif /* CONFIG_SMP */
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/*
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* Initialize the context management stuff.
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*/
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void __init mmu_context_init(void)
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{
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/* Mark init_mm as being active on all possible CPUs since
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* we'll get called with prev == init_mm the first time
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* we schedule on a given CPU
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*/
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init_mm.context.active = NR_CPUS;
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/*
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* The MPC8xx has only 16 contexts. We rotate through them on each
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* task switch. A better way would be to keep track of tasks that
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* own contexts, and implement an LRU usage. That way very active
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* tasks don't always have to pay the TLB reload overhead. The
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* kernel pages are mapped shared, so the kernel can run on behalf
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* of any task that makes a kernel entry. Shared does not mean they
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* are not protected, just that the ASID comparison is not performed.
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* -- Dan
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*
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* The IBM4xx has 256 contexts, so we can just rotate through these
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* as a way of "switching" contexts. If the TID of the TLB is zero,
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* the PID/TID comparison is disabled, so we can use a TID of zero
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* to represent all kernel pages as shared among all contexts.
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* -- Dan
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*
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* The IBM 47x core supports 16-bit PIDs, thus 65535 contexts. We
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* should normally never have to steal though the facility is
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* present if needed.
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* -- BenH
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*/
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if (mmu_has_feature(MMU_FTR_TYPE_8xx)) {
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first_context = 0;
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last_context = 15;
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} else if (mmu_has_feature(MMU_FTR_TYPE_47x)) {
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first_context = 1;
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last_context = 65535;
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} else
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#ifdef CONFIG_PPC_BOOK3E_MMU
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if (mmu_has_feature(MMU_FTR_TYPE_3E)) {
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u32 mmucfg = mfspr(SPRN_MMUCFG);
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u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK)
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>> MMUCFG_PIDSIZE_SHIFT;
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first_context = 1;
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last_context = (1UL << (pid_bits + 1)) - 1;
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} else
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#endif
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{
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first_context = 1;
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last_context = 255;
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}
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#ifdef DEBUG_CLAMP_LAST_CONTEXT
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last_context = DEBUG_CLAMP_LAST_CONTEXT;
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#endif
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/*
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* Allocate the maps used by context management
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*/
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context_map = alloc_bootmem(CTX_MAP_SIZE);
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context_mm = alloc_bootmem(sizeof(void *) * (last_context + 1));
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#ifndef CONFIG_SMP
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stale_map[0] = alloc_bootmem(CTX_MAP_SIZE);
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#else
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stale_map[boot_cpuid] = alloc_bootmem(CTX_MAP_SIZE);
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register_cpu_notifier(&mmu_context_cpu_nb);
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#endif
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printk(KERN_INFO
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"MMU: Allocated %zu bytes of context maps for %d contexts\n",
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2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)),
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last_context - first_context + 1);
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/*
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* Some processors have too few contexts to reserve one for
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* init_mm, and require using context 0 for a normal task.
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* Other processors reserve the use of context zero for the kernel.
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* This code assumes first_context < 32.
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*/
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context_map[0] = (1 << first_context) - 1;
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next_context = first_context;
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nr_free_contexts = last_context - first_context + 1;
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}
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