Marek Szyprowski 5f41f9198f ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores ... Some big.LITTLE systems have I-Cache line size mismatch between LITTLE and big cores. This patch adds a workaround for proper I-Cache support on such systems. Without it, some class of the userspace code (typically self-modifying) might suffer from random SIGILL failures. Similar workaround already exists for ARM64 architecture. I has been added by commit 116c81f427 ("arm64: Work around systems with mismatched cache line sizes"). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>		2019-06-20 22:29:58 +01:00
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asm	ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores	2019-06-20 22:29:58 +01:00
debug	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4	2019-05-21 11:28:40 +02:00
uapi/asm	KVM: export <linux/kvm_para.h> and <asm/kvm_para.h> iif KVM is supported	2019-03-28 17:27:42 +01:00