![Peter Zijlstra](/assets/img/avatar_default.png)
Paul suggested we allow for data addresses to be recorded along with the traditional IPs as power can provide these. For now, only the software pagefault events provide data addresses, but in the future power might as well for some events. x86 doesn't seem capable of providing this atm. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> LKML-Reference: <20090408130409.394816925@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
417 lines
12 KiB
C
417 lines
12 KiB
C
/*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Derived from "arch/i386/mm/fault.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Modified by Cort Dougan and Paul Mackerras.
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*
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* Modified for PPC64 by Dave Engebretsen (engebret@ibm.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/highmem.h>
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#include <linux/module.h>
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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#include <linux/perf_counter.h>
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#include <asm/firmware.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/mmu_context.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/tlbflush.h>
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#include <asm/siginfo.h>
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#ifdef CONFIG_KPROBES
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static inline int notify_page_fault(struct pt_regs *regs)
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{
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int ret = 0;
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/* kprobe_running() needs smp_processor_id() */
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if (!user_mode(regs)) {
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preempt_disable();
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if (kprobe_running() && kprobe_fault_handler(regs, 11))
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ret = 1;
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preempt_enable();
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}
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return ret;
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}
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#else
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static inline int notify_page_fault(struct pt_regs *regs)
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{
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return 0;
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}
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#endif
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/*
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* Check whether the instruction at regs->nip is a store using
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* an update addressing form which will update r1.
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*/
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static int store_updates_sp(struct pt_regs *regs)
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{
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unsigned int inst;
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if (get_user(inst, (unsigned int __user *)regs->nip))
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return 0;
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/* check for 1 in the rA field */
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if (((inst >> 16) & 0x1f) != 1)
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return 0;
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/* check major opcode */
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switch (inst >> 26) {
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case 37: /* stwu */
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case 39: /* stbu */
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case 45: /* sthu */
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case 53: /* stfsu */
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case 55: /* stfdu */
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return 1;
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case 62: /* std or stdu */
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return (inst & 3) == 1;
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case 31:
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/* check minor opcode */
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switch ((inst >> 1) & 0x3ff) {
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case 181: /* stdux */
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case 183: /* stwux */
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case 247: /* stbux */
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case 439: /* sthux */
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case 695: /* stfsux */
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case 759: /* stfdux */
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return 1;
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}
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}
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return 0;
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}
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/*
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* For 600- and 800-family processors, the error_code parameter is DSISR
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* for a data fault, SRR1 for an instruction fault. For 400-family processors
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* the error_code parameter is ESR for a data fault, 0 for an instruction
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* fault.
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* For 64-bit processors, the error_code parameter is
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* - DSISR for a non-SLB data access fault,
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* - SRR1 & 0x08000000 for a non-SLB instruction access fault
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* - 0 any SLB fault.
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*
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* The return value is 0 if the fault was handled, or the signal
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* number if this is a kernel fault that can't be handled here.
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*/
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int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
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unsigned long error_code)
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{
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struct vm_area_struct * vma;
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struct mm_struct *mm = current->mm;
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siginfo_t info;
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int code = SEGV_MAPERR;
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int is_write = 0, ret;
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int trap = TRAP(regs);
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int is_exec = trap == 0x400;
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#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
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/*
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* Fortunately the bit assignments in SRR1 for an instruction
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* fault and DSISR for a data fault are mostly the same for the
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* bits we are interested in. But there are some bits which
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* indicate errors in DSISR but can validly be set in SRR1.
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*/
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if (trap == 0x400)
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error_code &= 0x48200000;
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else
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is_write = error_code & DSISR_ISSTORE;
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#else
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is_write = error_code & ESR_DST;
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#endif /* CONFIG_4xx || CONFIG_BOOKE */
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if (notify_page_fault(regs))
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return 0;
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if (unlikely(debugger_fault_handler(regs)))
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return 0;
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/* On a kernel SLB miss we can only check for a valid exception entry */
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if (!user_mode(regs) && (address >= TASK_SIZE))
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return SIGSEGV;
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#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
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if (error_code & DSISR_DABRMATCH) {
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/* DABR match */
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do_dabr(regs, address, error_code);
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return 0;
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}
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#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/
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if (in_atomic() || mm == NULL) {
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if (!user_mode(regs))
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return SIGSEGV;
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/* in_atomic() in user mode is really bad,
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as is current->mm == NULL. */
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printk(KERN_EMERG "Page fault in user mode with "
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"in_atomic() = %d mm = %p\n", in_atomic(), mm);
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printk(KERN_EMERG "NIP = %lx MSR = %lx\n",
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regs->nip, regs->msr);
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die("Weird page fault", regs, SIGSEGV);
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}
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perf_swcounter_event(PERF_COUNT_PAGE_FAULTS, 1, 0, regs, address);
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/* When running in the kernel we expect faults to occur only to
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* addresses in user space. All other faults represent errors in the
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* kernel and should generate an OOPS. Unfortunately, in the case of an
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* erroneous fault occurring in a code path which already holds mmap_sem
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* we will deadlock attempting to validate the fault against the
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* address space. Luckily the kernel only validly references user
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* space from well defined areas of code, which are listed in the
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* exceptions table.
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*
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* As the vast majority of faults will be valid we will only perform
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* the source reference check when there is a possibility of a deadlock.
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* Attempt to lock the address space, if we cannot we then validate the
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* source. If this is invalid we can skip the address space check,
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* thus avoiding the deadlock.
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*/
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if (!down_read_trylock(&mm->mmap_sem)) {
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if (!user_mode(regs) && !search_exception_tables(regs->nip))
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goto bad_area_nosemaphore;
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down_read(&mm->mmap_sem);
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}
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vma = find_vma(mm, address);
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if (!vma)
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goto bad_area;
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if (vma->vm_start <= address)
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goto good_area;
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if (!(vma->vm_flags & VM_GROWSDOWN))
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goto bad_area;
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/*
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* N.B. The POWER/Open ABI allows programs to access up to
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* 288 bytes below the stack pointer.
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* The kernel signal delivery code writes up to about 1.5kB
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* below the stack pointer (r1) before decrementing it.
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* The exec code can write slightly over 640kB to the stack
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* before setting the user r1. Thus we allow the stack to
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* expand to 1MB without further checks.
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*/
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if (address + 0x100000 < vma->vm_end) {
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/* get user regs even if this fault is in kernel mode */
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struct pt_regs *uregs = current->thread.regs;
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if (uregs == NULL)
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goto bad_area;
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/*
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* A user-mode access to an address a long way below
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* the stack pointer is only valid if the instruction
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* is one which would update the stack pointer to the
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* address accessed if the instruction completed,
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* i.e. either stwu rs,n(r1) or stwux rs,r1,rb
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* (or the byte, halfword, float or double forms).
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*
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* If we don't check this then any write to the area
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* between the last mapped region and the stack will
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* expand the stack rather than segfaulting.
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*/
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if (address + 2048 < uregs->gpr[1]
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&& (!user_mode(regs) || !store_updates_sp(regs)))
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goto bad_area;
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}
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if (expand_stack(vma, address))
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goto bad_area;
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good_area:
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code = SEGV_ACCERR;
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#if defined(CONFIG_6xx)
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if (error_code & 0x95700000)
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/* an error such as lwarx to I/O controller space,
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address matching DABR, eciwx, etc. */
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goto bad_area;
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#endif /* CONFIG_6xx */
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#if defined(CONFIG_8xx)
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/* The MPC8xx seems to always set 0x80000000, which is
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* "undefined". Of those that can be set, this is the only
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* one which seems bad.
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*/
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if (error_code & 0x10000000)
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/* Guarded storage error. */
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goto bad_area;
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#endif /* CONFIG_8xx */
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if (is_exec) {
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#ifdef CONFIG_PPC_STD_MMU
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/* Protection fault on exec go straight to failure on
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* Hash based MMUs as they either don't support per-page
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* execute permission, or if they do, it's handled already
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* at the hash level. This test would probably have to
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* be removed if we change the way this works to make hash
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* processors use the same I/D cache coherency mechanism
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* as embedded.
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*/
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if (error_code & DSISR_PROTFAULT)
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goto bad_area;
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#endif /* CONFIG_PPC_STD_MMU */
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/*
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* Allow execution from readable areas if the MMU does not
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* provide separate controls over reading and executing.
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*
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* Note: That code used to not be enabled for 4xx/BookE.
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* It is now as I/D cache coherency for these is done at
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* set_pte_at() time and I see no reason why the test
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* below wouldn't be valid on those processors. This -may-
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* break programs compiled with a really old ABI though.
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*/
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if (!(vma->vm_flags & VM_EXEC) &&
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(cpu_has_feature(CPU_FTR_NOEXECUTE) ||
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!(vma->vm_flags & (VM_READ | VM_WRITE))))
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goto bad_area;
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/* a write */
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} else if (is_write) {
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if (!(vma->vm_flags & VM_WRITE))
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goto bad_area;
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/* a read */
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} else {
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/* protection fault */
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if (error_code & 0x08000000)
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goto bad_area;
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if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
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goto bad_area;
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}
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/*
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* If for any reason at all we couldn't handle the fault,
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* make sure we exit gracefully rather than endlessly redo
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* the fault.
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*/
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survive:
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ret = handle_mm_fault(mm, vma, address, is_write);
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if (unlikely(ret & VM_FAULT_ERROR)) {
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if (ret & VM_FAULT_OOM)
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goto out_of_memory;
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else if (ret & VM_FAULT_SIGBUS)
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goto do_sigbus;
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BUG();
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}
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if (ret & VM_FAULT_MAJOR) {
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current->maj_flt++;
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perf_swcounter_event(PERF_COUNT_PAGE_FAULTS_MAJ, 1, 0,
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regs, address);
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#ifdef CONFIG_PPC_SMLPAR
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if (firmware_has_feature(FW_FEATURE_CMO)) {
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preempt_disable();
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get_lppaca()->page_ins += (1 << PAGE_FACTOR);
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preempt_enable();
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}
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#endif
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} else {
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current->min_flt++;
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perf_swcounter_event(PERF_COUNT_PAGE_FAULTS_MIN, 1, 0,
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regs, address);
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}
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up_read(&mm->mmap_sem);
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return 0;
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bad_area:
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up_read(&mm->mmap_sem);
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bad_area_nosemaphore:
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/* User mode accesses cause a SIGSEGV */
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if (user_mode(regs)) {
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_exception(SIGSEGV, regs, code, address);
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return 0;
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}
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if (is_exec && (error_code & DSISR_PROTFAULT)
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&& printk_ratelimit())
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printk(KERN_CRIT "kernel tried to execute NX-protected"
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" page (%lx) - exploit attempt? (uid: %d)\n",
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address, current_uid());
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return SIGSEGV;
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/*
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* We ran out of memory, or some other thing happened to us that made
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* us unable to handle the page fault gracefully.
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*/
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out_of_memory:
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up_read(&mm->mmap_sem);
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if (is_global_init(current)) {
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yield();
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down_read(&mm->mmap_sem);
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goto survive;
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}
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printk("VM: killing process %s\n", current->comm);
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if (user_mode(regs))
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do_group_exit(SIGKILL);
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return SIGKILL;
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do_sigbus:
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up_read(&mm->mmap_sem);
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if (user_mode(regs)) {
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info.si_signo = SIGBUS;
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info.si_errno = 0;
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info.si_code = BUS_ADRERR;
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info.si_addr = (void __user *)address;
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force_sig_info(SIGBUS, &info, current);
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return 0;
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}
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return SIGBUS;
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}
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/*
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* bad_page_fault is called when we have a bad access from the kernel.
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* It is called from the DSI and ISI handlers in head.S and from some
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* of the procedures in traps.c.
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*/
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void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
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{
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const struct exception_table_entry *entry;
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/* Are we prepared to handle this fault? */
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if ((entry = search_exception_tables(regs->nip)) != NULL) {
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regs->nip = entry->fixup;
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return;
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}
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/* kernel has accessed a bad area */
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switch (regs->trap) {
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case 0x300:
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case 0x380:
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printk(KERN_ALERT "Unable to handle kernel paging request for "
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"data at address 0x%08lx\n", regs->dar);
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break;
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case 0x400:
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case 0x480:
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printk(KERN_ALERT "Unable to handle kernel paging request for "
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"instruction fetch\n");
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break;
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default:
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printk(KERN_ALERT "Unable to handle kernel paging request for "
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"unknown fault\n");
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break;
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}
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printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
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regs->nip);
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die("Kernel access of bad area", regs, sig);
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}
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