a02cb8f8de
In IEC 61883-6, AM824 is described as format of data block. In this format, one data block consists of several data channels, which is aligned to 32 bit. One data channel has 8 bit label field and 24 bit data field. PCM frames are transferred in Multi Bit Linear Audio (MBLA) data channel. This channel can include 16/20/24 bit PCM sample. As long as I know, models which support IEC 61883-1/6 doesn't allow to switch bit length of PCM sample in MBLA data channel. They always transmit/receive PCM frames of 24 bit length. This can be seen for the other models which support protocols similar to IEC 61883-1/6. On the other hand, current drivers for these protocols supports 16 bit length PCM sample in playback substream. In this case, PCM sample is put into the MBLA data channel with 8 bit padding in LSB side. Although 16 bit PCM sample is major because it's in CD format, this doesn't represent device capability as is. This commit removes support for 16 bit PCM samples in playback substream. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
160 lines
4.6 KiB
C
160 lines
4.6 KiB
C
/*
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* digi00x.h - a part of driver for Digidesign Digi 002/003 family
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*
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* Copyright (c) 2014-2015 Takashi Sakamoto
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*
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* Licensed under the terms of the GNU General Public License, version 2.
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*/
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#ifndef SOUND_DIGI00X_H_INCLUDED
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#define SOUND_DIGI00X_H_INCLUDED
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#include <linux/compat.h>
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#include <linux/device.h>
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#include <linux/firewire.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/sched/signal.h>
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#include <sound/core.h>
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#include <sound/initval.h>
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#include <sound/info.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/firewire.h>
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#include <sound/hwdep.h>
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#include <sound/rawmidi.h>
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#include "../lib.h"
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#include "../iso-resources.h"
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#include "../amdtp-stream.h"
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struct snd_dg00x {
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struct snd_card *card;
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struct fw_unit *unit;
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struct mutex mutex;
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spinlock_t lock;
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bool registered;
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struct delayed_work dwork;
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struct amdtp_stream tx_stream;
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struct fw_iso_resources tx_resources;
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struct amdtp_stream rx_stream;
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struct fw_iso_resources rx_resources;
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unsigned int substreams_counter;
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/* for uapi */
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int dev_lock_count;
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bool dev_lock_changed;
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wait_queue_head_t hwdep_wait;
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/* For asynchronous messages. */
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struct fw_address_handler async_handler;
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u32 msg;
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/* Console models have additional MIDI ports for control surface. */
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bool is_console;
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};
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#define DG00X_ADDR_BASE 0xffffe0000000ull
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#define DG00X_OFFSET_STREAMING_STATE 0x0000
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#define DG00X_OFFSET_STREAMING_SET 0x0004
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/* unknown but address in host space 0x0008 */
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/* For LSB of the address 0x000c */
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/* unknown 0x0010 */
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#define DG00X_OFFSET_MESSAGE_ADDR 0x0014
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/* For LSB of the address 0x0018 */
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/* unknown 0x001c */
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/* unknown 0x0020 */
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/* not used 0x0024--0x00ff */
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#define DG00X_OFFSET_ISOC_CHANNELS 0x0100
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/* unknown 0x0104 */
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/* unknown 0x0108 */
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/* unknown 0x010c */
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#define DG00X_OFFSET_LOCAL_RATE 0x0110
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#define DG00X_OFFSET_EXTERNAL_RATE 0x0114
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#define DG00X_OFFSET_CLOCK_SOURCE 0x0118
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#define DG00X_OFFSET_OPT_IFACE_MODE 0x011c
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/* unknown 0x0120 */
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/* Mixer control on/off 0x0124 */
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/* unknown 0x0128 */
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#define DG00X_OFFSET_DETECT_EXTERNAL 0x012c
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/* unknown 0x0138 */
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#define DG00X_OFFSET_MMC 0x0400
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enum snd_dg00x_rate {
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SND_DG00X_RATE_44100 = 0,
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SND_DG00X_RATE_48000,
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SND_DG00X_RATE_88200,
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SND_DG00X_RATE_96000,
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SND_DG00X_RATE_COUNT,
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};
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enum snd_dg00x_clock {
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SND_DG00X_CLOCK_INTERNAL = 0,
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SND_DG00X_CLOCK_SPDIF,
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SND_DG00X_CLOCK_ADAT,
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SND_DG00X_CLOCK_WORD,
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SND_DG00X_CLOCK_COUNT,
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};
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enum snd_dg00x_optical_mode {
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SND_DG00X_OPT_IFACE_MODE_ADAT = 0,
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SND_DG00X_OPT_IFACE_MODE_SPDIF,
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SND_DG00X_OPT_IFACE_MODE_COUNT,
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};
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#define DOT_MIDI_IN_PORTS 1
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#define DOT_MIDI_OUT_PORTS 2
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int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
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enum amdtp_stream_direction dir);
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int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
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unsigned int pcm_channels);
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void amdtp_dot_reset(struct amdtp_stream *s);
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int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
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struct snd_pcm_runtime *runtime);
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void amdtp_dot_midi_trigger(struct amdtp_stream *s, unsigned int port,
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struct snd_rawmidi_substream *midi);
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int snd_dg00x_transaction_register(struct snd_dg00x *dg00x);
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int snd_dg00x_transaction_reregister(struct snd_dg00x *dg00x);
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void snd_dg00x_transaction_unregister(struct snd_dg00x *dg00x);
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extern const unsigned int snd_dg00x_stream_rates[SND_DG00X_RATE_COUNT];
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extern const unsigned int snd_dg00x_stream_pcm_channels[SND_DG00X_RATE_COUNT];
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int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
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unsigned int *rate);
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int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x,
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unsigned int *rate);
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int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate);
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int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
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enum snd_dg00x_clock *clock);
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int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x,
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bool *detect);
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int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x);
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int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x, unsigned int rate);
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void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_lock_changed(struct snd_dg00x *dg00x);
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int snd_dg00x_stream_lock_try(struct snd_dg00x *dg00x);
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void snd_dg00x_stream_lock_release(struct snd_dg00x *dg00x);
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void snd_dg00x_proc_init(struct snd_dg00x *dg00x);
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int snd_dg00x_create_pcm_devices(struct snd_dg00x *dg00x);
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int snd_dg00x_create_midi_devices(struct snd_dg00x *dg00x);
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int snd_dg00x_create_hwdep_device(struct snd_dg00x *dg00x);
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#endif
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