![Amit Daniel Kachhap](/assets/img/avatar_default.png)
TMU urgently sends active-high signal (thermal trip) to PMU, and thermal tripping by hardware logic. Thermal tripping means that PMU cuts off the whole power of SoC by controlling external voltage regulator. Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
595 lines
15 KiB
C
595 lines
15 KiB
C
/*
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* exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
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*
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* Copyright (C) 2011 Samsung Electronics
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* Donggeun Kim <dg77.kim@samsung.com>
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* Amit Daniel Kachhap <amit.kachhap@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "exynos_thermal_common.h"
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#include "exynos_tmu.h"
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#include "exynos_tmu_data.h"
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struct exynos_tmu_data {
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struct exynos_tmu_platform_data *pdata;
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struct resource *mem;
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void __iomem *base;
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int irq;
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enum soc_type soc;
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struct work_struct irq_work;
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struct mutex lock;
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struct clk *clk;
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u8 temp_error1, temp_error2;
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};
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/*
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* TMU treats temperature as a mapped temperature code.
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* The temperature is converted differently depending on the calibration type.
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*/
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static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
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{
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struct exynos_tmu_platform_data *pdata = data->pdata;
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int temp_code;
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if (data->soc == SOC_ARCH_EXYNOS4210)
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/* temp should range between 25 and 125 */
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if (temp < 25 || temp > 125) {
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temp_code = -EINVAL;
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goto out;
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}
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switch (pdata->cal_type) {
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case TYPE_TWO_POINT_TRIMMING:
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temp_code = (temp - pdata->first_point_trim) *
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(data->temp_error2 - data->temp_error1) /
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(pdata->second_point_trim - pdata->first_point_trim) +
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data->temp_error1;
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break;
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case TYPE_ONE_POINT_TRIMMING:
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temp_code = temp + data->temp_error1 - pdata->first_point_trim;
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break;
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default:
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temp_code = temp + pdata->default_temp_offset;
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break;
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}
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out:
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return temp_code;
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}
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/*
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* Calculate a temperature value from a temperature code.
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* The unit of the temperature is degree Celsius.
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*/
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static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
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{
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struct exynos_tmu_platform_data *pdata = data->pdata;
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int temp;
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if (data->soc == SOC_ARCH_EXYNOS4210)
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/* temp_code should range between 75 and 175 */
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if (temp_code < 75 || temp_code > 175) {
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temp = -ENODATA;
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goto out;
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}
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switch (pdata->cal_type) {
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case TYPE_TWO_POINT_TRIMMING:
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temp = (temp_code - data->temp_error1) *
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(pdata->second_point_trim - pdata->first_point_trim) /
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(data->temp_error2 - data->temp_error1) +
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pdata->first_point_trim;
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break;
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case TYPE_ONE_POINT_TRIMMING:
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temp = temp_code - data->temp_error1 + pdata->first_point_trim;
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break;
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default:
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temp = temp_code - pdata->default_temp_offset;
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break;
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}
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out:
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return temp;
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}
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static int exynos_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct exynos_tmu_platform_data *pdata = data->pdata;
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const struct exynos_tmu_registers *reg = pdata->registers;
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unsigned int status, trim_info = 0, con;
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unsigned int rising_threshold = 0, falling_threshold = 0;
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int ret = 0, threshold_code, i, trigger_levs = 0;
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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status = readb(data->base + reg->tmu_status);
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if (!status) {
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ret = -EBUSY;
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goto out;
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}
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if (data->soc == SOC_ARCH_EXYNOS)
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__raw_writel(1, data->base + reg->triminfo_ctrl);
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/* Save trimming info in order to perform calibration */
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trim_info = readl(data->base + reg->triminfo_data);
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data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
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data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
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EXYNOS_TMU_TEMP_MASK);
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if ((pdata->min_efuse_value > data->temp_error1) ||
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(data->temp_error1 > pdata->max_efuse_value) ||
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(data->temp_error2 != 0))
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data->temp_error1 = pdata->efuse_value;
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if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) {
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dev_err(&pdev->dev, "Invalid max trigger level\n");
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goto out;
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}
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for (i = 0; i < pdata->max_trigger_level; i++) {
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if (!pdata->trigger_levels[i])
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continue;
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if ((pdata->trigger_type[i] == HW_TRIP) &&
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(!pdata->trigger_levels[pdata->max_trigger_level - 1])) {
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dev_err(&pdev->dev, "Invalid hw trigger level\n");
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ret = -EINVAL;
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goto out;
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}
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/* Count trigger levels except the HW trip*/
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if (!(pdata->trigger_type[i] == HW_TRIP))
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trigger_levs++;
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}
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if (data->soc == SOC_ARCH_EXYNOS4210) {
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/* Write temperature code for threshold */
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threshold_code = temp_to_code(data, pdata->threshold);
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if (threshold_code < 0) {
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ret = threshold_code;
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goto out;
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}
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writeb(threshold_code,
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data->base + reg->threshold_temp);
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for (i = 0; i < trigger_levs; i++)
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writeb(pdata->trigger_levels[i], data->base +
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reg->threshold_th0 + i * sizeof(reg->threshold_th0));
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writel(reg->inten_rise_mask, data->base + reg->tmu_intclear);
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} else if (data->soc == SOC_ARCH_EXYNOS) {
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/* Write temperature code for rising and falling threshold */
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for (i = 0;
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i < trigger_levs && i < EXYNOS_MAX_TRIGGER_PER_REG; i++) {
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threshold_code = temp_to_code(data,
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pdata->trigger_levels[i]);
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if (threshold_code < 0) {
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ret = threshold_code;
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goto out;
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}
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rising_threshold |= threshold_code << 8 * i;
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if (pdata->threshold_falling) {
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threshold_code = temp_to_code(data,
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pdata->trigger_levels[i] -
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pdata->threshold_falling);
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if (threshold_code > 0)
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falling_threshold |=
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threshold_code << 8 * i;
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}
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}
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writel(rising_threshold,
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data->base + reg->threshold_th0);
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writel(falling_threshold,
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data->base + reg->threshold_th1);
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writel((reg->inten_rise_mask << reg->inten_rise_shift) |
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(reg->inten_fall_mask << reg->inten_fall_shift),
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data->base + reg->tmu_intclear);
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/* if last threshold limit is also present */
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i = pdata->max_trigger_level - 1;
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if (pdata->trigger_levels[i] &&
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(pdata->trigger_type[i] == HW_TRIP)) {
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threshold_code = temp_to_code(data,
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pdata->trigger_levels[i]);
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if (threshold_code < 0) {
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ret = threshold_code;
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goto out;
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}
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rising_threshold |= threshold_code << 8 * i;
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writel(rising_threshold,
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data->base + reg->threshold_th0);
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con = readl(data->base + reg->tmu_ctrl);
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con |= (1 << reg->therm_trip_en_shift);
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writel(con, data->base + reg->tmu_ctrl);
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}
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}
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out:
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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return ret;
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}
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static void exynos_tmu_control(struct platform_device *pdev, bool on)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct exynos_tmu_platform_data *pdata = data->pdata;
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const struct exynos_tmu_registers *reg = pdata->registers;
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unsigned int con, interrupt_en;
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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con = readl(data->base + reg->tmu_ctrl);
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if (pdata->reference_voltage) {
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con &= ~(reg->buf_vref_sel_mask << reg->buf_vref_sel_shift);
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con |= pdata->reference_voltage << reg->buf_vref_sel_shift;
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}
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if (pdata->gain) {
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con &= ~(reg->buf_slope_sel_mask << reg->buf_slope_sel_shift);
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con |= (pdata->gain << reg->buf_slope_sel_shift);
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}
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if (pdata->noise_cancel_mode) {
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con &= ~(reg->therm_trip_mode_mask <<
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reg->therm_trip_mode_shift);
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con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift);
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}
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if (on) {
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con |= (1 << reg->core_en_shift);
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interrupt_en =
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pdata->trigger_enable[3] << reg->inten_rise3_shift |
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pdata->trigger_enable[2] << reg->inten_rise2_shift |
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pdata->trigger_enable[1] << reg->inten_rise1_shift |
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pdata->trigger_enable[0] << reg->inten_rise0_shift;
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if (pdata->threshold_falling)
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interrupt_en |=
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interrupt_en << reg->inten_fall0_shift;
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} else {
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con &= ~(1 << reg->core_en_shift);
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interrupt_en = 0; /* Disable all interrupts */
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}
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writel(interrupt_en, data->base + reg->tmu_inten);
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writel(con, data->base + reg->tmu_ctrl);
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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}
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static int exynos_tmu_read(struct exynos_tmu_data *data)
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{
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struct exynos_tmu_platform_data *pdata = data->pdata;
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const struct exynos_tmu_registers *reg = pdata->registers;
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u8 temp_code;
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int temp;
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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temp_code = readb(data->base + reg->tmu_cur_temp);
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temp = code_to_temp(data, temp_code);
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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return temp;
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}
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#ifdef CONFIG_THERMAL_EMULATION
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static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
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{
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struct exynos_tmu_data *data = drv_data;
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struct exynos_tmu_platform_data *pdata = data->pdata;
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const struct exynos_tmu_registers *reg = pdata->registers;
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unsigned int val;
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int ret = -EINVAL;
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if (data->soc == SOC_ARCH_EXYNOS4210)
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goto out;
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if (temp && temp < MCELSIUS)
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goto out;
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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val = readl(data->base + reg->emul_con);
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if (temp) {
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temp /= MCELSIUS;
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val = (EXYNOS_EMUL_TIME << reg->emul_time_shift) |
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(temp_to_code(data, temp)
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<< reg->emul_temp_shift) | EXYNOS_EMUL_ENABLE;
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} else {
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val &= ~EXYNOS_EMUL_ENABLE;
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}
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writel(val, data->base + reg->emul_con);
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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return 0;
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out:
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return ret;
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}
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#else
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static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
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{ return -EINVAL; }
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#endif/*CONFIG_THERMAL_EMULATION*/
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static void exynos_tmu_work(struct work_struct *work)
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{
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struct exynos_tmu_data *data = container_of(work,
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struct exynos_tmu_data, irq_work);
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struct exynos_tmu_platform_data *pdata = data->pdata;
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const struct exynos_tmu_registers *reg = pdata->registers;
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exynos_report_trigger();
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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if (data->soc == SOC_ARCH_EXYNOS)
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writel((reg->inten_rise_mask << reg->inten_rise_shift) |
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(reg->inten_fall_mask << reg->inten_fall_shift),
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data->base + reg->tmu_intclear);
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else
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writel(reg->inten_rise_mask, data->base + reg->tmu_intclear);
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clk_disable(data->clk);
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mutex_unlock(&data->lock);
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enable_irq(data->irq);
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}
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static irqreturn_t exynos_tmu_irq(int irq, void *id)
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{
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struct exynos_tmu_data *data = id;
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disable_irq_nosync(irq);
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schedule_work(&data->irq_work);
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return IRQ_HANDLED;
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}
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static struct thermal_sensor_conf exynos_sensor_conf = {
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.name = "exynos-therm",
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.read_temperature = (int (*)(void *))exynos_tmu_read,
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.write_emul_temp = exynos_tmu_set_emulation,
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};
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#ifdef CONFIG_OF
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static const struct of_device_id exynos_tmu_match[] = {
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{
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.compatible = "samsung,exynos4210-tmu",
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.data = (void *)EXYNOS4210_TMU_DRV_DATA,
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},
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{
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.compatible = "samsung,exynos4412-tmu",
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.data = (void *)EXYNOS5250_TMU_DRV_DATA,
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},
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{
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.compatible = "samsung,exynos5250-tmu",
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.data = (void *)EXYNOS5250_TMU_DRV_DATA,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, exynos_tmu_match);
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#endif
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static struct platform_device_id exynos_tmu_driver_ids[] = {
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{
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.name = "exynos4210-tmu",
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.driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
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},
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{
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.name = "exynos5250-tmu",
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.driver_data = (kernel_ulong_t)EXYNOS5250_TMU_DRV_DATA,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
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static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
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struct platform_device *pdev)
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{
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#ifdef CONFIG_OF
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if (pdev->dev.of_node) {
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const struct of_device_id *match;
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match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
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if (!match)
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return NULL;
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return (struct exynos_tmu_platform_data *) match->data;
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}
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#endif
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return (struct exynos_tmu_platform_data *)
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platform_get_device_id(pdev)->driver_data;
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}
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static int exynos_tmu_probe(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data;
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struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
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int ret, i;
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if (!pdata)
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pdata = exynos_get_driver_data(pdev);
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if (!pdata) {
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dev_err(&pdev->dev, "No platform init data supplied.\n");
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return -ENODEV;
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}
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data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
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GFP_KERNEL);
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if (!data) {
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dev_err(&pdev->dev, "Failed to allocate driver structure\n");
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return -ENOMEM;
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}
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data->irq = platform_get_irq(pdev, 0);
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if (data->irq < 0) {
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dev_err(&pdev->dev, "Failed to get platform irq\n");
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return data->irq;
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}
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INIT_WORK(&data->irq_work, exynos_tmu_work);
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data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->base = devm_ioremap_resource(&pdev->dev, data->mem);
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if (IS_ERR(data->base))
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return PTR_ERR(data->base);
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ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
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IRQF_TRIGGER_RISING, "exynos-tmu", data);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
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return ret;
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}
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data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
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if (IS_ERR(data->clk)) {
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dev_err(&pdev->dev, "Failed to get clock\n");
|
|
return PTR_ERR(data->clk);
|
|
}
|
|
|
|
ret = clk_prepare(data->clk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (pdata->type == SOC_ARCH_EXYNOS ||
|
|
pdata->type == SOC_ARCH_EXYNOS4210)
|
|
data->soc = pdata->type;
|
|
else {
|
|
ret = -EINVAL;
|
|
dev_err(&pdev->dev, "Platform not supported\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
data->pdata = pdata;
|
|
platform_set_drvdata(pdev, data);
|
|
mutex_init(&data->lock);
|
|
|
|
ret = exynos_tmu_initialize(pdev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to initialize TMU\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
exynos_tmu_control(pdev, true);
|
|
|
|
/* Register the sensor with thermal management interface */
|
|
(&exynos_sensor_conf)->private_data = data;
|
|
exynos_sensor_conf.trip_data.trip_count = pdata->trigger_enable[0] +
|
|
pdata->trigger_enable[1] + pdata->trigger_enable[2]+
|
|
pdata->trigger_enable[3];
|
|
|
|
for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
|
|
exynos_sensor_conf.trip_data.trip_val[i] =
|
|
pdata->threshold + pdata->trigger_levels[i];
|
|
|
|
exynos_sensor_conf.trip_data.trigger_falling = pdata->threshold_falling;
|
|
|
|
exynos_sensor_conf.cooling_data.freq_clip_count =
|
|
pdata->freq_tab_count;
|
|
for (i = 0; i < pdata->freq_tab_count; i++) {
|
|
exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
|
|
pdata->freq_tab[i].freq_clip_max;
|
|
exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
|
|
pdata->freq_tab[i].temp_level;
|
|
}
|
|
|
|
ret = exynos_register_thermal(&exynos_sensor_conf);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to register thermal interface\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
return 0;
|
|
err_clk:
|
|
clk_unprepare(data->clk);
|
|
return ret;
|
|
}
|
|
|
|
static int exynos_tmu_remove(struct platform_device *pdev)
|
|
{
|
|
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
|
|
|
exynos_tmu_control(pdev, false);
|
|
|
|
exynos_unregister_thermal();
|
|
|
|
clk_unprepare(data->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int exynos_tmu_suspend(struct device *dev)
|
|
{
|
|
exynos_tmu_control(to_platform_device(dev), false);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int exynos_tmu_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
exynos_tmu_initialize(pdev);
|
|
exynos_tmu_control(pdev, true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
|
|
exynos_tmu_suspend, exynos_tmu_resume);
|
|
#define EXYNOS_TMU_PM (&exynos_tmu_pm)
|
|
#else
|
|
#define EXYNOS_TMU_PM NULL
|
|
#endif
|
|
|
|
static struct platform_driver exynos_tmu_driver = {
|
|
.driver = {
|
|
.name = "exynos-tmu",
|
|
.owner = THIS_MODULE,
|
|
.pm = EXYNOS_TMU_PM,
|
|
.of_match_table = of_match_ptr(exynos_tmu_match),
|
|
},
|
|
.probe = exynos_tmu_probe,
|
|
.remove = exynos_tmu_remove,
|
|
.id_table = exynos_tmu_driver_ids,
|
|
};
|
|
|
|
module_platform_driver(exynos_tmu_driver);
|
|
|
|
MODULE_DESCRIPTION("EXYNOS TMU Driver");
|
|
MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:exynos-tmu");
|