Marc Zyngier 7e3a57fa6c arm64: Document ICC_CTLR_EL3.PMHE setting requirements ... It goes without saying, but better saying it: the kernel expects ICC_CTLR_EL3.PMHE to have the same value across all CPUs, and for that setting not to change during the lifetime of the kernel. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2019-10-15 12:26:15 +01:00
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acpi_object_usage.rst	docs: arm64: convert docs to ReST and rename to .rst	2019-06-14 14:20:27 -06:00
arm-acpi.rst	docs: arm64: convert docs to ReST and rename to .rst	2019-06-14 14:20:27 -06:00
booting.rst	arm64: Document ICC_CTLR_EL3.PMHE setting requirements	2019-10-15 12:26:15 +01:00
cpu-feature-registers.rst	docs: arm64: convert docs to ReST and rename to .rst	2019-06-14 14:20:27 -06:00
elf_hwcaps.rst	It's been a relatively busy cycle for docs:	2019-07-09 12:34:26 -07:00
hugetlbpage.rst	docs: arm64: convert docs to ReST and rename to .rst	2019-06-14 14:20:27 -06:00
index.rst	arm64: Add tagged-address-abi.rst to index.rst	2019-08-22 18:22:57 +01:00
kasan-offsets.sh	arm64: kasan: Switch to using KASAN_SHADOW_OFFSET	2019-08-09 11:17:11 +01:00
legacy_instructions.rst	docs: arm64: convert docs to ReST and rename to .rst	2019-06-14 14:20:27 -06:00
memory.rst	docs: arm64: Fix indentation and doc formatting	2019-10-01 13:32:35 +01:00
perf.txt	arm64: docs: Document perf event attributes	2019-04-24 15:46:26 +01:00
pointer-authentication.rst	docs: arm64: convert docs to ReST and rename to .rst	2019-06-14 14:20:27 -06:00
silicon-errata.rst	irqchip/gic-v3: Add quirks for HIP06/07 invalid GICD_TYPER erratum 161010803	2019-08-20 10:23:35 +01:00
sve.rst	It's been a relatively busy cycle for docs:	2019-07-09 12:34:26 -07:00
tagged-address-abi.rst	arm64: Define Documentation/arm64/tagged-address-abi.rst	2019-08-22 12:32:26 +01:00
tagged-pointers.rst	arm64: Relax Documentation/arm64/tagged-pointers.rst	2019-08-27 18:16:20 +01:00