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-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAl0siFoUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vzi9A//S4jRyyZrgUr88Az0GbgMhE4b3yqc uL7om/Sf+443gG6C+aKkZSM/IE9hrbyIKuYq7GGxDkzZ/HkucZo2yIuAHkPgG4ik QQYJ8fJsmMq1bUht87c1ZZwGP0++Deq/Ns2+VNy/WBYqKLulnV0DvEEaJgPs9C5D ppwccGdo6UghiujBTpE4ddUBjFjjURWqT6wSnMRDQ4EGwfUhG0MWwwHKI4hbBuaL N6refuggdYyUUX5FeUOHa6VF6uTnSSAQ75k+40n4nljdayqoumHLskst77o9q5ZI oXjdpwgmuEqYhfp03HEA4Xo/bBxiRj76NuTiEMKvPokxjpanwbLrdV0GhF0OIlM0 rp1NOI1w+vppFrU+rc2gtq+7hYXFmvdhjS29hFLeD91PP36N5d29jW5NVFpm7GCm n4TMGAOsu8RB+bNua6ZbZVcDk2EnPgQeIcM0ZPoBtPK19Fg/rScdEU4u/aFE1Y0Q C+Ks7D1qCvFpHzl/xAg0oo9v/jFsWef3qnQWOzot964Zz4W4NSVvB9Ox6Vbfj6C4 v331LJmlPxG8fxBNA3q28FrTxcG1NW6sgo3WY9VoSp/vc0aqaPKhm7sbraTt5IrI TwqA/WhnAHv90MQCGFcofANyYTkjPkKk2QBFK6b0suoAmVdwVWWELi1WaZ+HdvgQ JP7YpmC2cXcQBPk= =ZGxL -----END PGP SIGNATURE----- Merge tag 'pci-v5.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration changes: - Evaluate PCI Boot Configuration _DSM to learn if firmware wants us to preserve its resource assignments (Benjamin Herrenschmidt) - Simplify resource distribution (Nicholas Johnson) - Decode 32 GT/s link speed (Gustavo Pimentel) Virtualization: - Fix incorrect caching of VF config space size (Alex Williamson) - Fix VF driver probing sysfs knobs (Alex Williamson) Peer-to-peer DMA: - Fix dma_virt_ops check (Logan Gunthorpe) Altera host bridge driver: - Allow building as module (Ley Foon Tan) Armada 8K host bridge driver: - add PHYs support (Miquel Raynal) DesignWare host bridge driver: - Export APIs to support removable loadable module (Vidya Sagar) - Enable Relaxed Ordering erratum workaround only on Tegra20 & Tegra30 (Vidya Sagar) Hyper-V host bridge driver: - Fix use-after-free in eject (Dexuan Cui) Mobiveil host bridge driver: - Clean up and fix many issues, including non-identify mapped windows, 64-bit windows, multi-MSI, class code, INTx clearing (Hou Zhiqiang) Qualcomm host bridge driver: - Use clk bulk API for 2.4.0 controllers (Bjorn Andersson) - Add QCS404 support (Bjorn Andersson) - Assert PERST for at least 100ms (Niklas Cassel) R-Car host bridge driver: - Add r8a774a1 DT support (Biju Das) Tegra host bridge driver: - Add support for Gen2, opportunistic UpdateFC and ACK (PCIe protocol details) AER, GPIO-based PERST# (Manikanta Maddireddy) - Fix many issues, including power-on failure cases, interrupt masking in suspend, UPHY settings, AFI dynamic clock gating, pending DLL transactions (Manikanta Maddireddy) Xilinx host bridge driver: - Fix NWL Multi-MSI programming (Bharat Kumar Gogada) Endpoint support: - Fix 64bit BAR support (Alan Mikhak) - Fix pcitest build issues (Alan Mikhak, Andy Shevchenko) Bug fixes: - Fix NVIDIA GPU multi-function power dependencies (Abhishek Sahu) - Fix NVIDIA GPU HDA enablement issue (Lukas Wunner) - Ignore lockdep for sysfs "remove" (Marek Vasut) Misc: - Convert docs to reST (Changbin Du, Mauro Carvalho Chehab)" * tag 'pci-v5.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (107 commits) PCI: Enable NVIDIA HDA controllers tools: PCI: Fix installation when `make tools/pci_install` PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB PCI: Fix typos and whitespace errors PCI: mobiveil: Fix INTx interrupt clearing in mobiveil_pcie_isr() PCI: mobiveil: Fix infinite-loop in the INTx handling function PCI: mobiveil: Move PCIe PIO enablement out of inbound window routine PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setup PCI: mobiveil: Clear the control fields before updating it PCI: mobiveil: Add configured inbound windows counter PCI: mobiveil: Fix the valid check for inbound and outbound windows PCI: mobiveil: Clean-up program_{ib/ob}_windows() PCI: mobiveil: Remove an unnecessary return value check PCI: mobiveil: Fix error return values PCI: mobiveil: Refactor the MEM/IO outbound window initialization PCI: mobiveil: Make some register updates more readable PCI: mobiveil: Reformat the code for readability dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional ...
221 lines
5.1 KiB
C
221 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Code borrowed from powerpc/kernel/pci-common.c
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*
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* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
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* Copyright (C) 2014 ARM Ltd.
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/pci.h>
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#include <linux/pci-acpi.h>
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#include <linux/pci-ecam.h>
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#include <linux/slab.h>
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#ifdef CONFIG_ACPI
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/*
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* Try to assign the IRQ number when probing a new device
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*/
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int pcibios_alloc_irq(struct pci_dev *dev)
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{
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if (!acpi_disabled)
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acpi_pci_irq_enable(dev);
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return 0;
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}
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#endif
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/*
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* raw_pci_read/write - Platform-specific PCI config space access.
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*/
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int raw_pci_read(unsigned int domain, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *val)
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{
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struct pci_bus *b = pci_find_bus(domain, bus);
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if (!b)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return b->ops->read(b, devfn, reg, len, val);
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}
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int raw_pci_write(unsigned int domain, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 val)
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{
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struct pci_bus *b = pci_find_bus(domain, bus);
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if (!b)
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return PCIBIOS_DEVICE_NOT_FOUND;
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return b->ops->write(b, devfn, reg, len, val);
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}
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#ifdef CONFIG_NUMA
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int pcibus_to_node(struct pci_bus *bus)
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{
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return dev_to_node(&bus->dev);
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}
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EXPORT_SYMBOL(pcibus_to_node);
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#endif
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#ifdef CONFIG_ACPI
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struct acpi_pci_generic_root_info {
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struct acpi_pci_root_info common;
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struct pci_config_window *cfg; /* config space mapping */
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};
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int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
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{
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struct pci_config_window *cfg = bus->sysdata;
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struct acpi_device *adev = to_acpi_device(cfg->parent);
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struct acpi_pci_root *root = acpi_driver_data(adev);
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return root->segment;
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}
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int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
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{
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if (!acpi_disabled) {
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struct pci_config_window *cfg = bridge->bus->sysdata;
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struct acpi_device *adev = to_acpi_device(cfg->parent);
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struct device *bus_dev = &bridge->bus->dev;
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ACPI_COMPANION_SET(&bridge->dev, adev);
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set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev)));
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}
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return 0;
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}
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static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci)
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{
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struct resource_entry *entry, *tmp;
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int status;
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status = acpi_pci_probe_root_resources(ci);
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resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
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if (!(entry->res->flags & IORESOURCE_WINDOW))
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resource_list_destroy_entry(entry);
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}
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return status;
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}
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/*
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* Lookup the bus range for the domain in MCFG, and set up config space
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* mapping.
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*/
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static struct pci_config_window *
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pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
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{
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struct device *dev = &root->device->dev;
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struct resource *bus_res = &root->secondary;
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u16 seg = root->segment;
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struct pci_ecam_ops *ecam_ops;
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struct resource cfgres;
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struct acpi_device *adev;
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struct pci_config_window *cfg;
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int ret;
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ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops);
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if (ret) {
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dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res);
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return NULL;
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}
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adev = acpi_resource_consumer(&cfgres);
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if (adev)
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dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres,
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dev_name(&adev->dev));
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else
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dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n",
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&cfgres);
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cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops);
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if (IS_ERR(cfg)) {
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dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res,
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PTR_ERR(cfg));
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return NULL;
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}
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return cfg;
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}
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/* release_info: free resources allocated by init_info */
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static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci)
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{
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struct acpi_pci_generic_root_info *ri;
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ri = container_of(ci, struct acpi_pci_generic_root_info, common);
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pci_ecam_free(ri->cfg);
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kfree(ci->ops);
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kfree(ri);
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}
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/* Interface called from ACPI code to setup PCI host controller */
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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struct acpi_pci_generic_root_info *ri;
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struct pci_bus *bus, *child;
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struct acpi_pci_root_ops *root_ops;
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struct pci_host_bridge *host;
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ri = kzalloc(sizeof(*ri), GFP_KERNEL);
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if (!ri)
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return NULL;
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root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL);
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if (!root_ops) {
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kfree(ri);
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return NULL;
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}
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ri->cfg = pci_acpi_setup_ecam_mapping(root);
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if (!ri->cfg) {
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kfree(ri);
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kfree(root_ops);
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return NULL;
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}
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root_ops->release_info = pci_acpi_generic_release_info;
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root_ops->prepare_resources = pci_acpi_root_prepare_resources;
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root_ops->pci_ops = &ri->cfg->ops->pci_ops;
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bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg);
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if (!bus)
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return NULL;
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/* If we must preserve the resource configuration, claim now */
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host = pci_find_host_bridge(bus);
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if (host->preserve_config)
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pci_bus_claim_resources(bus);
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/*
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* Assign whatever was left unassigned. If we didn't claim above,
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* this will reassign everything.
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*/
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pci_assign_unassigned_root_bus_resources(bus);
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list_for_each_entry(child, &bus->children, node)
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pcie_bus_configure_settings(child);
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return bus;
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}
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void pcibios_add_bus(struct pci_bus *bus)
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{
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acpi_pci_add_bus(bus);
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}
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void pcibios_remove_bus(struct pci_bus *bus)
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{
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acpi_pci_remove_bus(bus);
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}
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#endif
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