![Thomas Gleixner](/assets/img/avatar_default.png)
I missed that coccinelle does not fix up header files by default. Reported-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: <lethal@linux-sh.org>
186 lines
5.4 KiB
C
186 lines
5.4 KiB
C
#include <linux/sh_intc.h>
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#include <linux/irq.h>
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#include <linux/list.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/radix-tree.h>
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#include <linux/sysdev.h>
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#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
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((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
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((addr_e) << 16) | ((addr_d << 24)))
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#define _INTC_SHIFT(h) (h & 0x1f)
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#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
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#define _INTC_FN(h) ((h >> 9) & 0xf)
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#define _INTC_MODE(h) ((h >> 13) & 0x7)
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#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
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#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
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#ifdef CONFIG_SMP
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#define IS_SMP(x) (x.smp)
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#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
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#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
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#else
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#define IS_SMP(x) 0
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#define INTC_REG(d, x, c) (d->reg[(x)])
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#define SMP_NR(d, x) 1
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#endif
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struct intc_handle_int {
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unsigned int irq;
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unsigned long handle;
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};
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struct intc_window {
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phys_addr_t phys;
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void __iomem *virt;
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unsigned long size;
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};
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struct intc_map_entry {
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intc_enum enum_id;
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struct intc_desc_int *desc;
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};
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struct intc_subgroup_entry {
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unsigned int pirq;
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intc_enum enum_id;
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unsigned long handle;
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};
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struct intc_desc_int {
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struct list_head list;
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struct sys_device sysdev;
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struct radix_tree_root tree;
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raw_spinlock_t lock;
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unsigned int index;
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unsigned long *reg;
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#ifdef CONFIG_SMP
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unsigned long *smp;
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#endif
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unsigned int nr_reg;
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struct intc_handle_int *prio;
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unsigned int nr_prio;
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struct intc_handle_int *sense;
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unsigned int nr_sense;
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struct intc_window *window;
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unsigned int nr_windows;
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struct irq_chip chip;
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};
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enum {
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REG_FN_ERR = 0,
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REG_FN_TEST_BASE = 1,
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REG_FN_WRITE_BASE = 5,
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REG_FN_MODIFY_BASE = 9
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};
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enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
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MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
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MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
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MODE_PRIO_REG, /* Priority value written to enable interrupt */
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MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
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};
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static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
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{
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struct irq_chip *chip = irq_get_chip(irq);
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return container_of(chip, struct intc_desc_int, chip);
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}
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/*
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* Grumble.
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*/
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static inline void activate_irq(int irq)
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{
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#ifdef CONFIG_ARM
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/* ARM requires an extra step to clear IRQ_NOREQUEST, which it
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* sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
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*/
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set_irq_flags(irq, IRQF_VALID);
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#else
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/* same effect on other architectures */
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irq_set_noprobe(irq);
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#endif
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}
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/* access.c */
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extern unsigned long
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(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
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extern unsigned long
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(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
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unsigned long (*fn)(unsigned long,
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unsigned long, unsigned long),
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unsigned int irq);
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extern unsigned long
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(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
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unsigned long (*fn)(unsigned long,
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unsigned long, unsigned long),
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unsigned int irq);
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extern unsigned long
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(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
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unsigned long (*fn)(unsigned long,
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unsigned long, unsigned long),
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unsigned int irq);
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unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
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unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
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unsigned int intc_set_field_from_handle(unsigned int value,
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unsigned int field_value,
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unsigned int handle);
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unsigned long intc_get_field_from_handle(unsigned int value,
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unsigned int handle);
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/* balancing.c */
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#ifdef CONFIG_INTC_BALANCING
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void intc_balancing_enable(unsigned int irq);
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void intc_balancing_disable(unsigned int irq);
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void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
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struct intc_desc_int *d, intc_enum id);
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#else
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static inline void intc_balancing_enable(unsigned int irq) { }
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static inline void intc_balancing_disable(unsigned int irq) { }
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static inline void
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intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
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struct intc_desc_int *d, intc_enum id) { }
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#endif
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/* chip.c */
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extern struct irq_chip intc_irq_chip;
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void _intc_enable(struct irq_data *data, unsigned long handle);
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/* core.c */
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extern struct list_head intc_list;
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extern raw_spinlock_t intc_big_lock;
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extern unsigned int nr_intc_controllers;
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extern struct sysdev_class intc_sysdev_class;
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unsigned int intc_get_dfl_prio_level(void);
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unsigned int intc_get_prio_level(unsigned int irq);
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void intc_set_prio_level(unsigned int irq, unsigned int level);
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/* handle.c */
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unsigned int intc_get_mask_handle(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id, int do_grps);
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unsigned int intc_get_prio_handle(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id, int do_grps);
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unsigned int intc_get_sense_handle(struct intc_desc *desc,
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struct intc_desc_int *d,
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intc_enum enum_id);
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void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
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struct intc_desc_int *d, intc_enum id);
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unsigned long intc_get_ack_handle(unsigned int irq);
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void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
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intc_enum enum_id, int enable);
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/* virq.c */
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void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
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void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
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struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);
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