![Philip Langdale](/assets/img/avatar_default.png)
During development of SDHC support, it was discovered that the definition for R6 was incorrect. This patch fixes that and patches the drivers that do switch on the response type. Signed-off-by: Philip Langdale <philipl@overt.org> Cc: Alex Dubov <oakad@yahoo.com> Cc: Pavel Pisa <ppisa@pikron.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
934 lines
25 KiB
C
934 lines
25 KiB
C
/*
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* tifm_sd.c - TI FlashMedia driver
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*
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* Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/tifm.h>
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#include <linux/mmc/protocol.h>
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#include <linux/mmc/host.h>
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#include <linux/highmem.h>
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#include <asm/io.h>
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#define DRIVER_NAME "tifm_sd"
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#define DRIVER_VERSION "0.6"
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static int no_dma = 0;
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static int fixed_timeout = 0;
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module_param(no_dma, bool, 0644);
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module_param(fixed_timeout, bool, 0644);
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/* Constants here are mostly from OMAP5912 datasheet */
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#define TIFM_MMCSD_RESET 0x0002
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#define TIFM_MMCSD_CLKMASK 0x03ff
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#define TIFM_MMCSD_POWER 0x0800
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#define TIFM_MMCSD_4BBUS 0x8000
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#define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
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#define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
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#define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
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#define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
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#define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
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#define TIFM_MMCSD_READ 0x8000
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#define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
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#define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
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#define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
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#define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
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#define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
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#define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
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#define TIFM_MMCSD_DTO 0x0020 /* data time-out */
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#define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
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#define TIFM_MMCSD_CTO 0x0080 /* command time-out */
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#define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
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#define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
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#define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
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#define TIFM_MMCSD_CERR 0x4000 /* card status error */
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#define TIFM_MMCSD_FIFO_SIZE 0x0020
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#define TIFM_MMCSD_RSP_R0 0x0000
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#define TIFM_MMCSD_RSP_R1 0x0100
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#define TIFM_MMCSD_RSP_R2 0x0200
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#define TIFM_MMCSD_RSP_R3 0x0300
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#define TIFM_MMCSD_RSP_R4 0x0400
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#define TIFM_MMCSD_RSP_R5 0x0500
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#define TIFM_MMCSD_RSP_R6 0x0600
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#define TIFM_MMCSD_RSP_BUSY 0x0800
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#define TIFM_MMCSD_CMD_BC 0x0000
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#define TIFM_MMCSD_CMD_BCR 0x1000
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#define TIFM_MMCSD_CMD_AC 0x2000
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#define TIFM_MMCSD_CMD_ADTC 0x3000
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typedef enum {
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IDLE = 0,
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CMD, /* main command ended */
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BRS, /* block transfer finished */
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SCMD, /* stop command ended */
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CARD, /* card left busy state */
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FIFO, /* FIFO operation completed (uncertain) */
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READY
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} card_state_t;
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enum {
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FIFO_RDY = 0x0001, /* hardware dependent value */
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HOST_REG = 0x0002,
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EJECT = 0x0004,
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EJECT_DONE = 0x0008,
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CARD_BUSY = 0x0010,
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OPENDRAIN = 0x0040, /* hardware dependent value */
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CARD_EVENT = 0x0100, /* hardware dependent value */
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CARD_RO = 0x0200, /* hardware dependent value */
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FIFO_EVENT = 0x10000 }; /* hardware dependent value */
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struct tifm_sd {
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struct tifm_dev *dev;
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unsigned int flags;
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card_state_t state;
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unsigned int clk_freq;
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unsigned int clk_div;
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unsigned long timeout_jiffies; // software timeout - 2 sec
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struct mmc_request *req;
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struct work_struct cmd_handler;
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struct delayed_work abort_handler;
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wait_queue_head_t can_eject;
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size_t written_blocks;
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char *buffer;
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size_t buffer_size;
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size_t buffer_pos;
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};
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static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
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unsigned int host_status)
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{
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struct mmc_command *cmd = host->req->cmd;
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unsigned int t_val = 0, cnt = 0;
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if (host_status & TIFM_MMCSD_BRS) {
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/* in non-dma rx mode BRS fires when fifo is still not empty */
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if (host->buffer && (cmd->data->flags & MMC_DATA_READ)) {
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while (host->buffer_size > host->buffer_pos) {
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t_val = readl(sock->addr + SOCK_MMCSD_DATA);
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host->buffer[host->buffer_pos++] = t_val & 0xff;
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host->buffer[host->buffer_pos++] =
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(t_val >> 8) & 0xff;
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}
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}
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return 1;
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} else if (host->buffer) {
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if ((cmd->data->flags & MMC_DATA_READ) &&
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(host_status & TIFM_MMCSD_AF)) {
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for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
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t_val = readl(sock->addr + SOCK_MMCSD_DATA);
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if (host->buffer_size > host->buffer_pos) {
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host->buffer[host->buffer_pos++] =
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t_val & 0xff;
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host->buffer[host->buffer_pos++] =
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(t_val >> 8) & 0xff;
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}
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}
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} else if ((cmd->data->flags & MMC_DATA_WRITE)
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&& (host_status & TIFM_MMCSD_AE)) {
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for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
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if (host->buffer_size > host->buffer_pos) {
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t_val = host->buffer[host->buffer_pos++] & 0x00ff;
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t_val |= ((host->buffer[host->buffer_pos++]) << 8)
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& 0xff00;
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writel(t_val,
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sock->addr + SOCK_MMCSD_DATA);
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}
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}
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}
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}
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return 0;
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}
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static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
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{
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unsigned int rc = 0;
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switch (mmc_resp_type(cmd)) {
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case MMC_RSP_NONE:
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rc |= TIFM_MMCSD_RSP_R0;
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break;
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case MMC_RSP_R1B:
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rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
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case MMC_RSP_R1:
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rc |= TIFM_MMCSD_RSP_R1;
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break;
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case MMC_RSP_R2:
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rc |= TIFM_MMCSD_RSP_R2;
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break;
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case MMC_RSP_R3:
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rc |= TIFM_MMCSD_RSP_R3;
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break;
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default:
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BUG();
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}
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switch (mmc_cmd_type(cmd)) {
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case MMC_CMD_BC:
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rc |= TIFM_MMCSD_CMD_BC;
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break;
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case MMC_CMD_BCR:
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rc |= TIFM_MMCSD_CMD_BCR;
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break;
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case MMC_CMD_AC:
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rc |= TIFM_MMCSD_CMD_AC;
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break;
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case MMC_CMD_ADTC:
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rc |= TIFM_MMCSD_CMD_ADTC;
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break;
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default:
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BUG();
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}
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return rc;
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}
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static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
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{
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struct tifm_dev *sock = host->dev;
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unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
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(host->flags & OPENDRAIN);
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if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
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cmd_mask |= TIFM_MMCSD_READ;
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dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
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cmd->opcode, cmd->arg, cmd_mask);
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writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
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writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
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writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
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}
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static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
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{
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cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
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| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
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cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
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| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
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cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
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| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
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cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
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| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
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}
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static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
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unsigned int host_status)
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{
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struct mmc_command *cmd = host->req->cmd;
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change_state:
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switch (host->state) {
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case IDLE:
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return;
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case CMD:
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if (host_status & TIFM_MMCSD_EOC) {
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tifm_sd_fetch_resp(cmd, sock);
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if (cmd->data) {
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host->state = BRS;
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} else
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host->state = READY;
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goto change_state;
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}
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break;
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case BRS:
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if (tifm_sd_transfer_data(sock, host, host_status)) {
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if (!host->req->stop) {
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if (cmd->data->flags & MMC_DATA_WRITE) {
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host->state = CARD;
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} else {
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host->state =
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host->buffer ? READY : FIFO;
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}
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goto change_state;
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}
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tifm_sd_exec(host, host->req->stop);
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host->state = SCMD;
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}
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break;
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case SCMD:
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if (host_status & TIFM_MMCSD_EOC) {
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tifm_sd_fetch_resp(host->req->stop, sock);
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if (cmd->error) {
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host->state = READY;
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} else if (cmd->data->flags & MMC_DATA_WRITE) {
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host->state = CARD;
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} else {
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host->state = host->buffer ? READY : FIFO;
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}
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goto change_state;
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}
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break;
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case CARD:
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if (!(host->flags & CARD_BUSY)
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&& (host->written_blocks == cmd->data->blocks)) {
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host->state = host->buffer ? READY : FIFO;
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goto change_state;
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}
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break;
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case FIFO:
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if (host->flags & FIFO_RDY) {
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host->state = READY;
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host->flags &= ~FIFO_RDY;
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goto change_state;
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}
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break;
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case READY:
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queue_work(sock->wq, &host->cmd_handler);
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return;
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}
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queue_delayed_work(sock->wq, &host->abort_handler,
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host->timeout_jiffies);
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}
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/* Called from interrupt handler */
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static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
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unsigned int sock_irq_status)
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{
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struct tifm_sd *host;
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unsigned int host_status = 0, fifo_status = 0;
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int error_code = 0;
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spin_lock(&sock->lock);
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host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
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cancel_delayed_work(&host->abort_handler);
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if (sock_irq_status & FIFO_EVENT) {
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fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
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writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
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host->flags |= fifo_status & FIFO_RDY;
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}
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if (sock_irq_status & CARD_EVENT) {
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host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
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writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
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if (!(host->flags & HOST_REG))
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queue_work(sock->wq, &host->cmd_handler);
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if (!host->req)
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goto done;
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if (host_status & TIFM_MMCSD_ERRMASK) {
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if (host_status & TIFM_MMCSD_CERR)
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error_code = MMC_ERR_FAILED;
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else if (host_status &
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(TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
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error_code = MMC_ERR_TIMEOUT;
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else if (host_status &
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(TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
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error_code = MMC_ERR_BADCRC;
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writel(TIFM_FIFO_INT_SETALL,
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sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
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writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
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if (host->req->stop) {
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if (host->state == SCMD) {
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host->req->stop->error = error_code;
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} else if(host->state == BRS) {
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host->req->cmd->error = error_code;
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tifm_sd_exec(host, host->req->stop);
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queue_delayed_work(sock->wq,
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&host->abort_handler,
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host->timeout_jiffies);
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host->state = SCMD;
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goto done;
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} else {
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host->req->cmd->error = error_code;
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}
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} else {
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host->req->cmd->error = error_code;
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}
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host->state = READY;
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}
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if (host_status & TIFM_MMCSD_CB)
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host->flags |= CARD_BUSY;
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if ((host_status & TIFM_MMCSD_EOFB) &&
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(host->flags & CARD_BUSY)) {
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host->written_blocks++;
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host->flags &= ~CARD_BUSY;
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}
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}
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if (host->req)
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tifm_sd_process_cmd(sock, host, host_status);
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done:
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dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
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host_status, fifo_status);
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spin_unlock(&sock->lock);
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return sock_irq_status;
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}
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static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
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{
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struct tifm_dev *sock = card->dev;
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unsigned int dest_cnt;
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/* DMA style IO */
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writel(TIFM_FIFO_INT_SETALL,
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sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
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writel(ilog2(cmd->data->blksz) - 2,
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sock->addr + SOCK_FIFO_PAGE_SIZE);
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writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
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writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
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dest_cnt = (cmd->data->blocks) << 8;
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writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
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writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
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writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
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if (cmd->data->flags & MMC_DATA_WRITE) {
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writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
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writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
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sock->addr + SOCK_DMA_CONTROL);
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} else {
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writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
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writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
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}
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}
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static void tifm_sd_set_data_timeout(struct tifm_sd *host,
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struct mmc_data *data)
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{
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struct tifm_dev *sock = host->dev;
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unsigned int data_timeout = data->timeout_clks;
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if (fixed_timeout)
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return;
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data_timeout += data->timeout_ns /
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((1000000000 / host->clk_freq) * host->clk_div);
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data_timeout *= 10; // call it fudge factor for now
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if (data_timeout < 0xffff) {
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writel((~TIFM_MMCSD_DPE) &
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readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
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sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
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writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
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} else {
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writel(TIFM_MMCSD_DPE |
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readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
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sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
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data_timeout = (data_timeout >> 10) + 1;
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if(data_timeout > 0xffff)
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data_timeout = 0; /* set to unlimited */
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writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
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}
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}
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|
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static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct tifm_sd *host = mmc_priv(mmc);
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struct tifm_dev *sock = host->dev;
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unsigned long flags;
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int sg_count = 0;
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struct mmc_data *r_data = mrq->cmd->data;
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spin_lock_irqsave(&sock->lock, flags);
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if (host->flags & EJECT) {
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spin_unlock_irqrestore(&sock->lock, flags);
|
|
goto err_out;
|
|
}
|
|
|
|
if (host->req) {
|
|
printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
goto err_out;
|
|
}
|
|
|
|
if (r_data) {
|
|
tifm_sd_set_data_timeout(host, r_data);
|
|
|
|
sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
|
|
mrq->cmd->flags & MMC_DATA_WRITE
|
|
? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
|
|
if (sg_count != 1) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": scatterlist map failed\n");
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
goto err_out;
|
|
}
|
|
|
|
host->written_blocks = 0;
|
|
host->flags &= ~CARD_BUSY;
|
|
tifm_sd_prepare_data(host, mrq->cmd);
|
|
}
|
|
|
|
host->req = mrq;
|
|
host->state = CMD;
|
|
queue_delayed_work(sock->wq, &host->abort_handler,
|
|
host->timeout_jiffies);
|
|
writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
tifm_sd_exec(host, mrq->cmd);
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
return;
|
|
|
|
err_out:
|
|
if (sg_count > 0)
|
|
tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
|
|
(r_data->flags & MMC_DATA_WRITE)
|
|
? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
|
|
|
|
mrq->cmd->error = MMC_ERR_TIMEOUT;
|
|
mmc_request_done(mmc, mrq);
|
|
}
|
|
|
|
static void tifm_sd_end_cmd(struct work_struct *work)
|
|
{
|
|
struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
|
|
struct tifm_dev *sock = host->dev;
|
|
struct mmc_host *mmc = tifm_get_drvdata(sock);
|
|
struct mmc_request *mrq;
|
|
struct mmc_data *r_data = NULL;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
|
|
mrq = host->req;
|
|
host->req = NULL;
|
|
host->state = IDLE;
|
|
|
|
if (!mrq) {
|
|
printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
return;
|
|
}
|
|
|
|
r_data = mrq->cmd->data;
|
|
if (r_data) {
|
|
if (r_data->flags & MMC_DATA_WRITE) {
|
|
r_data->bytes_xfered = host->written_blocks *
|
|
r_data->blksz;
|
|
} else {
|
|
r_data->bytes_xfered = r_data->blocks -
|
|
readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
|
|
r_data->bytes_xfered *= r_data->blksz;
|
|
r_data->bytes_xfered += r_data->blksz -
|
|
readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
|
|
}
|
|
tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
|
|
(r_data->flags & MMC_DATA_WRITE)
|
|
? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
|
|
}
|
|
|
|
writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
mmc_request_done(mmc, mrq);
|
|
}
|
|
|
|
static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
|
|
{
|
|
struct tifm_sd *host = mmc_priv(mmc);
|
|
struct tifm_dev *sock = host->dev;
|
|
unsigned long flags;
|
|
struct mmc_data *r_data = mrq->cmd->data;
|
|
char *t_buffer = NULL;
|
|
|
|
if (r_data) {
|
|
t_buffer = kmap(r_data->sg->page);
|
|
if (!t_buffer) {
|
|
printk(KERN_ERR DRIVER_NAME ": kmap failed\n");
|
|
goto err_out;
|
|
}
|
|
}
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
if (host->flags & EJECT) {
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
goto err_out;
|
|
}
|
|
|
|
if (host->req) {
|
|
printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
goto err_out;
|
|
}
|
|
|
|
if (r_data) {
|
|
tifm_sd_set_data_timeout(host, r_data);
|
|
|
|
host->buffer = t_buffer + r_data->sg->offset;
|
|
host->buffer_size = mrq->cmd->data->blocks *
|
|
mrq->cmd->data->blksz;
|
|
|
|
writel(TIFM_MMCSD_BUFINT |
|
|
readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
|
|
sock->addr + SOCK_MMCSD_INT_ENABLE);
|
|
writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
|
|
(TIFM_MMCSD_FIFO_SIZE - 1),
|
|
sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
|
|
|
|
host->written_blocks = 0;
|
|
host->flags &= ~CARD_BUSY;
|
|
host->buffer_pos = 0;
|
|
writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
|
|
writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
|
|
}
|
|
|
|
host->req = mrq;
|
|
host->state = CMD;
|
|
queue_delayed_work(sock->wq, &host->abort_handler,
|
|
host->timeout_jiffies);
|
|
writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
tifm_sd_exec(host, mrq->cmd);
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
return;
|
|
|
|
err_out:
|
|
if (t_buffer)
|
|
kunmap(r_data->sg->page);
|
|
|
|
mrq->cmd->error = MMC_ERR_TIMEOUT;
|
|
mmc_request_done(mmc, mrq);
|
|
}
|
|
|
|
static void tifm_sd_end_cmd_nodma(struct work_struct *work)
|
|
{
|
|
struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
|
|
struct tifm_dev *sock = host->dev;
|
|
struct mmc_host *mmc = tifm_get_drvdata(sock);
|
|
struct mmc_request *mrq;
|
|
struct mmc_data *r_data = NULL;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
|
|
mrq = host->req;
|
|
host->req = NULL;
|
|
host->state = IDLE;
|
|
|
|
if (!mrq) {
|
|
printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
return;
|
|
}
|
|
|
|
r_data = mrq->cmd->data;
|
|
if (r_data) {
|
|
writel((~TIFM_MMCSD_BUFINT) &
|
|
readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
|
|
sock->addr + SOCK_MMCSD_INT_ENABLE);
|
|
|
|
if (r_data->flags & MMC_DATA_WRITE) {
|
|
r_data->bytes_xfered = host->written_blocks *
|
|
r_data->blksz;
|
|
} else {
|
|
r_data->bytes_xfered = r_data->blocks -
|
|
readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
|
|
r_data->bytes_xfered *= r_data->blksz;
|
|
r_data->bytes_xfered += r_data->blksz -
|
|
readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
|
|
}
|
|
host->buffer = NULL;
|
|
host->buffer_pos = 0;
|
|
host->buffer_size = 0;
|
|
}
|
|
|
|
writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
|
|
if (r_data)
|
|
kunmap(r_data->sg->page);
|
|
|
|
mmc_request_done(mmc, mrq);
|
|
}
|
|
|
|
static void tifm_sd_abort(struct work_struct *work)
|
|
{
|
|
struct tifm_sd *host =
|
|
container_of(work, struct tifm_sd, abort_handler.work);
|
|
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": card failed to respond for a long period of time");
|
|
tifm_eject(host->dev);
|
|
}
|
|
|
|
static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|
{
|
|
struct tifm_sd *host = mmc_priv(mmc);
|
|
struct tifm_dev *sock = host->dev;
|
|
unsigned int clk_div1, clk_div2;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
|
|
dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
|
|
ios->power_mode);
|
|
if (ios->bus_width == MMC_BUS_WIDTH_4) {
|
|
writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
|
|
sock->addr + SOCK_MMCSD_CONFIG);
|
|
} else {
|
|
writel((~TIFM_MMCSD_4BBUS) &
|
|
readl(sock->addr + SOCK_MMCSD_CONFIG),
|
|
sock->addr + SOCK_MMCSD_CONFIG);
|
|
}
|
|
|
|
if (ios->clock) {
|
|
clk_div1 = 20000000 / ios->clock;
|
|
if (!clk_div1)
|
|
clk_div1 = 1;
|
|
|
|
clk_div2 = 24000000 / ios->clock;
|
|
if (!clk_div2)
|
|
clk_div2 = 1;
|
|
|
|
if ((20000000 / clk_div1) > ios->clock)
|
|
clk_div1++;
|
|
if ((24000000 / clk_div2) > ios->clock)
|
|
clk_div2++;
|
|
if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
|
|
host->clk_freq = 20000000;
|
|
host->clk_div = clk_div1;
|
|
writel((~TIFM_CTRL_FAST_CLK) &
|
|
readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
} else {
|
|
host->clk_freq = 24000000;
|
|
host->clk_div = clk_div2;
|
|
writel(TIFM_CTRL_FAST_CLK |
|
|
readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
}
|
|
} else {
|
|
host->clk_div = 0;
|
|
}
|
|
host->clk_div &= TIFM_MMCSD_CLKMASK;
|
|
writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
|
|
readl(sock->addr + SOCK_MMCSD_CONFIG)),
|
|
sock->addr + SOCK_MMCSD_CONFIG);
|
|
|
|
if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
|
|
host->flags |= OPENDRAIN;
|
|
else
|
|
host->flags &= ~OPENDRAIN;
|
|
|
|
/* chip_select : maybe later */
|
|
//vdd
|
|
//power is set before probe / after remove
|
|
//I believe, power_off when already marked for eject is sufficient to
|
|
// allow removal.
|
|
if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
|
|
host->flags |= EJECT_DONE;
|
|
wake_up_all(&host->can_eject);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
}
|
|
|
|
static int tifm_sd_ro(struct mmc_host *mmc)
|
|
{
|
|
int rc;
|
|
struct tifm_sd *host = mmc_priv(mmc);
|
|
struct tifm_dev *sock = host->dev;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
|
|
host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
|
|
rc = (host->flags & CARD_RO) ? 1 : 0;
|
|
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
return rc;
|
|
}
|
|
|
|
static struct mmc_host_ops tifm_sd_ops = {
|
|
.request = tifm_sd_request,
|
|
.set_ios = tifm_sd_ios,
|
|
.get_ro = tifm_sd_ro
|
|
};
|
|
|
|
static void tifm_sd_register_host(struct work_struct *work)
|
|
{
|
|
struct tifm_sd *host = container_of(work, struct tifm_sd, cmd_handler);
|
|
struct tifm_dev *sock = host->dev;
|
|
struct mmc_host *mmc = tifm_get_drvdata(sock);
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
host->flags |= HOST_REG;
|
|
PREPARE_WORK(&host->cmd_handler,
|
|
no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd);
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
dev_dbg(&sock->dev, "adding host\n");
|
|
mmc_add_host(mmc);
|
|
}
|
|
|
|
static int tifm_sd_probe(struct tifm_dev *sock)
|
|
{
|
|
struct mmc_host *mmc;
|
|
struct tifm_sd *host;
|
|
int rc = -EIO;
|
|
|
|
if (!(TIFM_SOCK_STATE_OCCUPIED &
|
|
readl(sock->addr + SOCK_PRESENT_STATE))) {
|
|
printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
|
|
return rc;
|
|
}
|
|
|
|
mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
|
|
if (!mmc)
|
|
return -ENOMEM;
|
|
|
|
host = mmc_priv(mmc);
|
|
host->dev = sock;
|
|
host->clk_div = 61;
|
|
init_waitqueue_head(&host->can_eject);
|
|
INIT_WORK(&host->cmd_handler, tifm_sd_register_host);
|
|
INIT_DELAYED_WORK(&host->abort_handler, tifm_sd_abort);
|
|
|
|
tifm_set_drvdata(sock, mmc);
|
|
sock->signal_irq = tifm_sd_signal_irq;
|
|
|
|
host->clk_freq = 20000000;
|
|
host->timeout_jiffies = msecs_to_jiffies(1000);
|
|
|
|
tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
|
|
mmc->ops = &tifm_sd_ops;
|
|
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
mmc->caps = MMC_CAP_4_BIT_DATA;
|
|
mmc->f_min = 20000000 / 60;
|
|
mmc->f_max = 24000000;
|
|
mmc->max_hw_segs = 1;
|
|
mmc->max_phys_segs = 1;
|
|
mmc->max_sectors = 127;
|
|
mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
|
|
|
|
writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
|
|
writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
|
|
writel(host->clk_div | TIFM_MMCSD_POWER,
|
|
sock->addr + SOCK_MMCSD_CONFIG);
|
|
|
|
for (rc = 0; rc < 50; rc++) {
|
|
/* Wait for reset ack */
|
|
if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
|
|
rc = 0;
|
|
break;
|
|
}
|
|
msleep(10);
|
|
}
|
|
|
|
if (rc) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": card not ready - probe failed\n");
|
|
mmc_free_host(mmc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
|
|
writel(host->clk_div | TIFM_MMCSD_POWER,
|
|
sock->addr + SOCK_MMCSD_CONFIG);
|
|
writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
|
|
writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
|
|
sock->addr + SOCK_MMCSD_INT_ENABLE);
|
|
|
|
writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); // command timeout 64 clocks for now
|
|
writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
|
|
writel(host->clk_div | TIFM_MMCSD_POWER,
|
|
sock->addr + SOCK_MMCSD_CONFIG);
|
|
|
|
queue_delayed_work(sock->wq, &host->abort_handler,
|
|
host->timeout_jiffies);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tifm_sd_host_is_down(struct tifm_dev *sock)
|
|
{
|
|
struct mmc_host *mmc = tifm_get_drvdata(sock);
|
|
struct tifm_sd *host = mmc_priv(mmc);
|
|
unsigned long flags;
|
|
int rc = 0;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
rc = (host->flags & EJECT_DONE);
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
return rc;
|
|
}
|
|
|
|
static void tifm_sd_remove(struct tifm_dev *sock)
|
|
{
|
|
struct mmc_host *mmc = tifm_get_drvdata(sock);
|
|
struct tifm_sd *host = mmc_priv(mmc);
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sock->lock, flags);
|
|
host->flags |= EJECT;
|
|
if (host->req)
|
|
queue_work(sock->wq, &host->cmd_handler);
|
|
spin_unlock_irqrestore(&sock->lock, flags);
|
|
wait_event_timeout(host->can_eject, tifm_sd_host_is_down(sock),
|
|
host->timeout_jiffies);
|
|
|
|
if (host->flags & HOST_REG)
|
|
mmc_remove_host(mmc);
|
|
|
|
/* The meaning of the bit majority in this constant is unknown. */
|
|
writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
|
|
sock->addr + SOCK_CONTROL);
|
|
writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
|
|
writel(TIFM_FIFO_INT_SETALL,
|
|
sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
|
|
writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
|
|
|
|
tifm_set_drvdata(sock, NULL);
|
|
mmc_free_host(mmc);
|
|
}
|
|
|
|
static tifm_media_id tifm_sd_id_tbl[] = {
|
|
FM_SD, 0
|
|
};
|
|
|
|
static struct tifm_driver tifm_sd_driver = {
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.owner = THIS_MODULE
|
|
},
|
|
.id_table = tifm_sd_id_tbl,
|
|
.probe = tifm_sd_probe,
|
|
.remove = tifm_sd_remove
|
|
};
|
|
|
|
static int __init tifm_sd_init(void)
|
|
{
|
|
return tifm_register_driver(&tifm_sd_driver);
|
|
}
|
|
|
|
static void __exit tifm_sd_exit(void)
|
|
{
|
|
tifm_unregister_driver(&tifm_sd_driver);
|
|
}
|
|
|
|
MODULE_AUTHOR("Alex Dubov");
|
|
MODULE_DESCRIPTION("TI FlashMedia SD driver");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
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MODULE_VERSION(DRIVER_VERSION);
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module_init(tifm_sd_init);
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module_exit(tifm_sd_exit);
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