![Enric Balletbo i Serra](/assets/img/avatar_default.png)
On many boards, communication between the kernel and the Embedded Controller happens over an LPC bus. In these cases, the kernel config CONFIG_CROS_EC_LPC is enabled. Some of these LPC boards contain a Microchip Embedded Controller (MEC) that is different from the regular EC. On these devices, the same LPC bus is used, but the protocol is a little different. In these cases, the CONFIG_CROS_EC_LPC_MEC kernel config is enabled. Currently, the kernel decides at compile-time whether or not to use the MEC variant, and, when that kernel option is selected it breaks the other boards. We would like a kind of runtime detection to avoid this. This patch adds that detection mechanism by probing the protocol at runtime, first we assume that a MEC variant is connected, and if the protocol fails it fallbacks to the regular EC. This adds a bit of overload because we try to read twice on those LPC boards that doesn't contain a MEC variant, but is a better solution than having to select the EC variant at compile-time. While here also fix the alignment in Kconfig file for this config option replacing the spaces by tabs. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Nick Crews <ncrews@chromium.org> Reviewed-by: Nick Crews <ncrews@chromium.org>
590 lines
14 KiB
C
590 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// LPC interface for ChromeOS Embedded Controller
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//
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// Copyright (C) 2012-2015 Google, Inc
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//
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// This driver uses the ChromeOS EC byte-level message-based protocol for
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// communicating the keyboard state (which keys are pressed) from a keyboard EC
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// to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
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// but everything else (including deghosting) is done here. The main
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// motivation for this is to keep the EC firmware as simple as possible, since
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// it cannot be easily upgraded and EC flash/IRAM space is relatively
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// expensive.
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#include <linux/acpi.h>
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#include <linux/dmi.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/cros_ec.h>
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#include <linux/mfd/cros_ec_commands.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/printk.h>
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#include <linux/suspend.h>
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#include "cros_ec_lpc_mec.h"
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#define DRV_NAME "cros_ec_lpcs"
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#define ACPI_DRV_NAME "GOOG0004"
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/* True if ACPI device is present */
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static bool cros_ec_lpc_acpi_device_found;
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/**
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* struct lpc_driver_ops - LPC driver operations
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* @read: Copy length bytes from EC address offset into buffer dest. Returns
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* the 8-bit checksum of all bytes read.
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* @write: Copy length bytes from buffer msg into EC address offset. Returns
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* the 8-bit checksum of all bytes written.
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*/
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struct lpc_driver_ops {
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u8 (*read)(unsigned int offset, unsigned int length, u8 *dest);
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u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg);
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};
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static struct lpc_driver_ops cros_ec_lpc_ops = { };
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/*
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* A generic instance of the read function of struct lpc_driver_ops, used for
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* the LPC EC.
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*/
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static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length,
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u8 *dest)
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{
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int sum = 0;
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int i;
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for (i = 0; i < length; ++i) {
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dest[i] = inb(offset + i);
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sum += dest[i];
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}
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/* Return checksum of all bytes read */
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return sum;
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}
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/*
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* A generic instance of the write function of struct lpc_driver_ops, used for
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* the LPC EC.
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*/
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static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length,
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const u8 *msg)
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{
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int sum = 0;
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int i;
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for (i = 0; i < length; ++i) {
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outb(msg[i], offset + i);
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sum += msg[i];
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}
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/* Return checksum of all bytes written */
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return sum;
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}
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/*
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* An instance of the read function of struct lpc_driver_ops, used for the
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* MEC variant of LPC EC.
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*/
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static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length,
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u8 *dest)
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{
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int in_range = cros_ec_lpc_mec_in_range(offset, length);
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if (in_range < 0)
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return 0;
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return in_range ?
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cros_ec_lpc_io_bytes_mec(MEC_IO_READ,
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offset - EC_HOST_CMD_REGION0,
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length, dest) :
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cros_ec_lpc_read_bytes(offset, length, dest);
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}
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/*
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* An instance of the write function of struct lpc_driver_ops, used for the
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* MEC variant of LPC EC.
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*/
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static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length,
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const u8 *msg)
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{
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int in_range = cros_ec_lpc_mec_in_range(offset, length);
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if (in_range < 0)
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return 0;
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return in_range ?
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cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE,
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offset - EC_HOST_CMD_REGION0,
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length, (u8 *)msg) :
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cros_ec_lpc_write_bytes(offset, length, msg);
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}
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static int ec_response_timed_out(void)
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{
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unsigned long one_second = jiffies + HZ;
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u8 data;
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usleep_range(200, 300);
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do {
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if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) &
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EC_LPC_STATUS_BUSY_MASK))
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return 0;
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usleep_range(100, 200);
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} while (time_before(jiffies, one_second));
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return 1;
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}
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static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
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struct cros_ec_command *msg)
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{
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struct ec_host_response response;
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u8 sum;
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int ret = 0;
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u8 *dout;
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ret = cros_ec_prepare_tx(ec, msg);
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/* Write buffer */
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cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
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/* Here we go */
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sum = EC_COMMAND_PROTOCOL_3;
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cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
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if (ec_response_timed_out()) {
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dev_warn(ec->dev, "EC responsed timed out\n");
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ret = -EIO;
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goto done;
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}
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/* Check result */
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msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
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ret = cros_ec_check_result(ec, msg);
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if (ret)
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goto done;
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/* Read back response */
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dout = (u8 *)&response;
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sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
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dout);
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msg->result = response.result;
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if (response.data_len > msg->insize) {
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dev_err(ec->dev,
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"packet too long (%d bytes, expected %d)",
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response.data_len, msg->insize);
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ret = -EMSGSIZE;
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goto done;
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}
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/* Read response and process checksum */
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sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET +
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sizeof(response), response.data_len,
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msg->data);
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if (sum) {
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dev_err(ec->dev,
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"bad packet checksum %02x\n",
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response.checksum);
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ret = -EBADMSG;
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goto done;
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}
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/* Return actual amount of data received */
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ret = response.data_len;
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done:
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return ret;
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}
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static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
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struct cros_ec_command *msg)
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{
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struct ec_lpc_host_args args;
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u8 sum;
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int ret = 0;
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if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
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msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
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dev_err(ec->dev,
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"invalid buffer sizes (out %d, in %d)\n",
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msg->outsize, msg->insize);
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return -EINVAL;
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}
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/* Now actually send the command to the EC and get the result */
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args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
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args.command_version = msg->version;
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args.data_size = msg->outsize;
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/* Initialize checksum */
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sum = msg->command + args.flags + args.command_version + args.data_size;
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/* Copy data and update checksum */
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sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
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msg->data);
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/* Finalize checksum and write args */
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args.checksum = sum;
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cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
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(u8 *)&args);
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/* Here we go */
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sum = msg->command;
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cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
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if (ec_response_timed_out()) {
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dev_warn(ec->dev, "EC responsed timed out\n");
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ret = -EIO;
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goto done;
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}
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/* Check result */
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msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
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ret = cros_ec_check_result(ec, msg);
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if (ret)
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goto done;
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/* Read back args */
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cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
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if (args.data_size > msg->insize) {
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dev_err(ec->dev,
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"packet too long (%d bytes, expected %d)",
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args.data_size, msg->insize);
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ret = -ENOSPC;
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goto done;
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}
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/* Start calculating response checksum */
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sum = msg->command + args.flags + args.command_version + args.data_size;
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/* Read response and update checksum */
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sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size,
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msg->data);
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/* Verify checksum */
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if (args.checksum != sum) {
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dev_err(ec->dev,
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"bad packet checksum, expected %02x, got %02x\n",
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args.checksum, sum);
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ret = -EBADMSG;
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goto done;
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}
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/* Return actual amount of data received */
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ret = args.data_size;
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done:
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return ret;
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}
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/* Returns num bytes read, or negative on error. Doesn't need locking. */
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static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
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unsigned int bytes, void *dest)
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{
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int i = offset;
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char *s = dest;
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int cnt = 0;
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if (offset >= EC_MEMMAP_SIZE - bytes)
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return -EINVAL;
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/* fixed length */
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if (bytes) {
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cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
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return bytes;
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}
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/* string */
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for (; i < EC_MEMMAP_SIZE; i++, s++) {
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cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s);
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cnt++;
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if (!*s)
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break;
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}
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return cnt;
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}
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static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
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{
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struct cros_ec_device *ec_dev = data;
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if (ec_dev->mkbp_event_supported &&
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cros_ec_get_next_event(ec_dev, NULL) > 0)
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blocking_notifier_call_chain(&ec_dev->event_notifier, 0,
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ec_dev);
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if (value == ACPI_NOTIFY_DEVICE_WAKE)
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pm_system_wakeup();
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}
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static int cros_ec_lpc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct acpi_device *adev;
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acpi_status status;
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struct cros_ec_device *ec_dev;
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u8 buf[2];
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int irq, ret;
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if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
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dev_name(dev))) {
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dev_err(dev, "couldn't reserve memmap region\n");
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return -EBUSY;
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}
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/*
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* Read the mapped ID twice, the first one is assuming the
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* EC is a Microchip Embedded Controller (MEC) variant, if the
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* protocol fails, fallback to the non MEC variant and try to
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* read again the ID.
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*/
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cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes;
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cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
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cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
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if (buf[0] != 'E' || buf[1] != 'C') {
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/* Re-assign read/write operations for the non MEC variant */
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cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
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cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
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cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2,
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buf);
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if (buf[0] != 'E' || buf[1] != 'C') {
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dev_err(dev, "EC ID not detected\n");
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return -ENODEV;
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}
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}
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if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
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EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
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dev_err(dev, "couldn't reserve region0\n");
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return -EBUSY;
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}
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if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
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EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
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dev_err(dev, "couldn't reserve region1\n");
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return -EBUSY;
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}
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ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
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if (!ec_dev)
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return -ENOMEM;
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platform_set_drvdata(pdev, ec_dev);
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ec_dev->dev = dev;
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ec_dev->phys_name = dev_name(dev);
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ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
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ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
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ec_dev->cmd_readmem = cros_ec_lpc_readmem;
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ec_dev->din_size = sizeof(struct ec_host_response) +
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sizeof(struct ec_response_get_protocol_info);
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ec_dev->dout_size = sizeof(struct ec_host_request);
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/*
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* Some boards do not have an IRQ allotted for cros_ec_lpc,
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* which makes ENXIO an expected (and safe) scenario.
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*/
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irq = platform_get_irq(pdev, 0);
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if (irq > 0)
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ec_dev->irq = irq;
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else if (irq != -ENXIO) {
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dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq);
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return irq;
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}
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ret = cros_ec_register(ec_dev);
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if (ret) {
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dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
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return ret;
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}
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/*
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* Connect a notify handler to process MKBP messages if we have a
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* companion ACPI device.
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*/
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adev = ACPI_COMPANION(dev);
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if (adev) {
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status = acpi_install_notify_handler(adev->handle,
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ACPI_ALL_NOTIFY,
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cros_ec_lpc_acpi_notify,
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ec_dev);
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if (ACPI_FAILURE(status))
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dev_warn(dev, "Failed to register notifier %08x\n",
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status);
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}
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return 0;
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}
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static int cros_ec_lpc_remove(struct platform_device *pdev)
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{
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struct acpi_device *adev;
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adev = ACPI_COMPANION(&pdev->dev);
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if (adev)
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acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
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cros_ec_lpc_acpi_notify);
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return 0;
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}
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static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
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{ ACPI_DRV_NAME, 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
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static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
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{
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/*
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* Today all Chromebooks/boxes ship with Google_* as version and
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* coreboot as bios vendor. No other systems with this
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* combination are known to date.
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*/
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.matches = {
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DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
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DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
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},
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},
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{
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/*
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* If the box is running custom coreboot firmware then the
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* DMI BIOS version string will not be matched by "Google_",
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* but the system vendor string will still be matched by
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* "GOOGLE".
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*/
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.matches = {
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DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
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DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
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},
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},
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{
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/* x86-link, the Chromebook Pixel. */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
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},
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},
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{
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/* x86-samus, the Chromebook Pixel 2. */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
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},
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},
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{
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/* x86-peppy, the Acer C720 Chromebook. */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
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},
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},
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{
|
|
/* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
|
|
},
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int cros_ec_lpc_suspend(struct device *dev)
|
|
{
|
|
struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
|
|
|
|
return cros_ec_suspend(ec_dev);
|
|
}
|
|
|
|
static int cros_ec_lpc_resume(struct device *dev)
|
|
{
|
|
struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
|
|
|
|
return cros_ec_resume(ec_dev);
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops cros_ec_lpc_pm_ops = {
|
|
SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
|
|
};
|
|
|
|
static struct platform_driver cros_ec_lpc_driver = {
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.acpi_match_table = cros_ec_lpc_acpi_device_ids,
|
|
.pm = &cros_ec_lpc_pm_ops,
|
|
},
|
|
.probe = cros_ec_lpc_probe,
|
|
.remove = cros_ec_lpc_remove,
|
|
};
|
|
|
|
static struct platform_device cros_ec_lpc_device = {
|
|
.name = DRV_NAME
|
|
};
|
|
|
|
static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level,
|
|
void *context, void **retval)
|
|
{
|
|
*(bool *)context = true;
|
|
return AE_CTRL_TERMINATE;
|
|
}
|
|
|
|
static int __init cros_ec_lpc_init(void)
|
|
{
|
|
int ret;
|
|
acpi_status status;
|
|
|
|
status = acpi_get_devices(ACPI_DRV_NAME, cros_ec_lpc_parse_device,
|
|
&cros_ec_lpc_acpi_device_found, NULL);
|
|
if (ACPI_FAILURE(status))
|
|
pr_warn(DRV_NAME ": Looking for %s failed\n", ACPI_DRV_NAME);
|
|
|
|
if (!cros_ec_lpc_acpi_device_found &&
|
|
!dmi_check_system(cros_ec_lpc_dmi_table)) {
|
|
pr_err(DRV_NAME ": unsupported system.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0,
|
|
EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE);
|
|
|
|
/* Register the driver */
|
|
ret = platform_driver_register(&cros_ec_lpc_driver);
|
|
if (ret) {
|
|
pr_err(DRV_NAME ": can't register driver: %d\n", ret);
|
|
cros_ec_lpc_mec_destroy();
|
|
return ret;
|
|
}
|
|
|
|
if (!cros_ec_lpc_acpi_device_found) {
|
|
/* Register the device, and it'll get hooked up automatically */
|
|
ret = platform_device_register(&cros_ec_lpc_device);
|
|
if (ret) {
|
|
pr_err(DRV_NAME ": can't register device: %d\n", ret);
|
|
platform_driver_unregister(&cros_ec_lpc_driver);
|
|
cros_ec_lpc_mec_destroy();
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit cros_ec_lpc_exit(void)
|
|
{
|
|
if (!cros_ec_lpc_acpi_device_found)
|
|
platform_device_unregister(&cros_ec_lpc_device);
|
|
platform_driver_unregister(&cros_ec_lpc_driver);
|
|
cros_ec_lpc_mec_destroy();
|
|
}
|
|
|
|
module_init(cros_ec_lpc_init);
|
|
module_exit(cros_ec_lpc_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("ChromeOS EC LPC driver");
|