![Linus Torvalds](/assets/img/avatar_default.png)
Pull DMA mask updates from Russell King: "This series cleans up the handling of DMA masks in a lot of drivers, fixing some bugs as we go. Some of the more serious errors include: - drivers which only set their coherent DMA mask if the attempt to set the streaming mask fails. - drivers which test for a NULL dma mask pointer, and then set the dma mask pointer to a location in their module .data section - which will cause problems if the module is reloaded. To counter these, I have introduced two helper functions: - dma_set_mask_and_coherent() takes care of setting both the streaming and coherent masks at the same time, with the correct error handling as specified by the API. - dma_coerce_mask_and_coherent() which resolves the problem of drivers forcefully setting DMA masks. This is more a marker for future work to further clean these locations up - the code which creates the devices really should be initialising these, but to fix that in one go along with this change could potentially be very disruptive. The last thing this series does is prise away some of Linux's addition to "DMA addresses are physical addresses and RAM always starts at zero". We have ARM LPAE systems where all system memory is above 4GB physical, hence having DMA masks interpreted by (eg) the block layers as describing physical addresses in the range 0..DMAMASK fails on these platforms. Santosh Shilimkar addresses this in this series; the patches were copied to the appropriate people multiple times but were ignored. Fixing this also gets rid of some ARM weirdness in the setup of the max*pfn variables, and brings ARM into line with every other Linux architecture as far as those go" * 'for-linus-dma-masks' of git://git.linaro.org/people/rmk/linux-arm: (52 commits) ARM: 7805/1: mm: change max*pfn to include the physical offset of memory ARM: 7797/1: mmc: Use dma_max_pfn(dev) helper for bounce_limit calculations ARM: 7796/1: scsi: Use dma_max_pfn(dev) helper for bounce_limit calculations ARM: 7795/1: mm: dma-mapping: Add dma_max_pfn(dev) helper function ARM: 7794/1: block: Rename parameter dma_mask to max_addr for blk_queue_bounce_limit() ARM: DMA-API: better handing of DMA masks for coherent allocations ARM: 7857/1: dma: imx-sdma: setup dma mask DMA-API: firmware/google/gsmi.c: avoid direct access to DMA masks DMA-API: dcdbas: update DMA mask handing DMA-API: dma: edma.c: no need to explicitly initialize DMA masks DMA-API: usb: musb: use platform_device_register_full() to avoid directly messing with dma masks DMA-API: crypto: remove last references to 'static struct device *dev' DMA-API: crypto: fix ixp4xx crypto platform device support DMA-API: others: use dma_set_coherent_mask() DMA-API: staging: use dma_set_coherent_mask() DMA-API: usb: use new dma_coerce_mask_and_coherent() DMA-API: usb: use dma_set_coherent_mask() DMA-API: parport: parport_pc.c: use dma_coerce_mask_and_coherent() DMA-API: net: octeon: use dma_coerce_mask_and_coherent() DMA-API: net: nxp/lpc_eth: use dma_coerce_mask_and_coherent() ...
393 lines
9.1 KiB
C
393 lines
9.1 KiB
C
/*
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* imx-pcm-fiq.c -- ALSA Soc Audio Layer
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*
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* Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* This code is based on code copyrighted by Freescale,
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* Liam Girdwood, Javier Martin and probably others.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <asm/fiq.h>
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#include <linux/platform_data/asoc-imx-ssi.h>
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#include "imx-ssi.h"
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#include "imx-pcm.h"
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struct imx_pcm_runtime_data {
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unsigned int period;
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int periods;
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unsigned long offset;
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struct hrtimer hrt;
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int poll_time_ns;
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struct snd_pcm_substream *substream;
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atomic_t running;
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};
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static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
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{
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struct imx_pcm_runtime_data *iprtd =
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container_of(hrt, struct imx_pcm_runtime_data, hrt);
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struct snd_pcm_substream *substream = iprtd->substream;
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struct pt_regs regs;
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if (!atomic_read(&iprtd->running))
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return HRTIMER_NORESTART;
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get_fiq_regs(®s);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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iprtd->offset = regs.ARM_r8 & 0xffff;
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else
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iprtd->offset = regs.ARM_r9 & 0xffff;
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snd_pcm_period_elapsed(substream);
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hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
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return HRTIMER_RESTART;
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}
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static struct fiq_handler fh = {
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.name = DRV_NAME,
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};
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static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct imx_pcm_runtime_data *iprtd = runtime->private_data;
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iprtd->periods = params_periods(params);
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iprtd->period = params_period_bytes(params);
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iprtd->offset = 0;
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iprtd->poll_time_ns = 1000000000 / params_rate(params) *
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params_period_size(params);
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snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
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return 0;
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}
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static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct imx_pcm_runtime_data *iprtd = runtime->private_data;
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struct pt_regs regs;
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get_fiq_regs(®s);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
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else
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regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
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set_fiq_regs(®s);
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return 0;
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}
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static int fiq_enable;
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static int imx_pcm_fiq;
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static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct imx_pcm_runtime_data *iprtd = runtime->private_data;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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atomic_set(&iprtd->running, 1);
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hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
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HRTIMER_MODE_REL);
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if (++fiq_enable == 1)
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enable_fiq(imx_pcm_fiq);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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atomic_set(&iprtd->running, 0);
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if (--fiq_enable == 0)
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disable_fiq(imx_pcm_fiq);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct imx_pcm_runtime_data *iprtd = runtime->private_data;
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return bytes_to_frames(substream->runtime, iprtd->offset);
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}
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static struct snd_pcm_hardware snd_imx_hardware = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_RESUME,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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.rate_min = 8000,
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.channels_min = 2,
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.channels_max = 2,
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.buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
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.period_bytes_min = 128,
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.period_bytes_max = 16 * 1024,
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.periods_min = 4,
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.periods_max = 255,
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.fifo_size = 0,
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};
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static int snd_imx_open(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct imx_pcm_runtime_data *iprtd;
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int ret;
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iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
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if (iprtd == NULL)
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return -ENOMEM;
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runtime->private_data = iprtd;
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iprtd->substream = substream;
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atomic_set(&iprtd->running, 0);
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hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
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iprtd->hrt.function = snd_hrtimer_callback;
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ret = snd_pcm_hw_constraint_integer(substream->runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0) {
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kfree(iprtd);
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return ret;
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}
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snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
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return 0;
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}
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static int snd_imx_close(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct imx_pcm_runtime_data *iprtd = runtime->private_data;
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hrtimer_cancel(&iprtd->hrt);
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kfree(iprtd);
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return 0;
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}
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static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
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struct vm_area_struct *vma)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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int ret;
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ret = dma_mmap_writecombine(substream->pcm->card->dev, vma,
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runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
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pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
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runtime->dma_area,
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runtime->dma_addr,
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runtime->dma_bytes);
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return ret;
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}
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static struct snd_pcm_ops imx_pcm_ops = {
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.open = snd_imx_open,
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.close = snd_imx_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = snd_imx_pcm_hw_params,
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.prepare = snd_imx_pcm_prepare,
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.trigger = snd_imx_pcm_trigger,
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.pointer = snd_imx_pcm_pointer,
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.mmap = snd_imx_pcm_mmap,
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};
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static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
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{
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struct snd_pcm_substream *substream = pcm->streams[stream].substream;
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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size_t size = IMX_SSI_DMABUF_SIZE;
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buf->dev.type = SNDRV_DMA_TYPE_DEV;
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buf->dev.dev = pcm->card->dev;
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buf->private_data = NULL;
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buf->area = dma_alloc_writecombine(pcm->card->dev, size,
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&buf->addr, GFP_KERNEL);
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if (!buf->area)
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return -ENOMEM;
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buf->bytes = size;
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return 0;
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}
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static int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_card *card = rtd->card->snd_card;
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struct snd_pcm *pcm = rtd->pcm;
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int ret;
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ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
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ret = imx_pcm_preallocate_dma_buffer(pcm,
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SNDRV_PCM_STREAM_PLAYBACK);
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if (ret)
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goto out;
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}
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if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
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ret = imx_pcm_preallocate_dma_buffer(pcm,
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SNDRV_PCM_STREAM_CAPTURE);
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if (ret)
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goto out;
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}
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out:
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return ret;
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}
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static int ssi_irq = 0;
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static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_pcm *pcm = rtd->pcm;
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struct snd_pcm_substream *substream;
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int ret;
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ret = imx_pcm_new(rtd);
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if (ret)
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return ret;
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substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
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if (substream) {
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
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}
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substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
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if (substream) {
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
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}
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set_fiq_handler(&imx_ssi_fiq_start,
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&imx_ssi_fiq_end - &imx_ssi_fiq_start);
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return 0;
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}
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static void imx_pcm_free(struct snd_pcm *pcm)
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{
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struct snd_pcm_substream *substream;
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struct snd_dma_buffer *buf;
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int stream;
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for (stream = 0; stream < 2; stream++) {
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substream = pcm->streams[stream].substream;
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if (!substream)
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continue;
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buf = &substream->dma_buffer;
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if (!buf->area)
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continue;
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dma_free_writecombine(pcm->card->dev, buf->bytes,
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buf->area, buf->addr);
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buf->area = NULL;
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}
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}
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static void imx_pcm_fiq_free(struct snd_pcm *pcm)
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{
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mxc_set_irq_fiq(ssi_irq, 0);
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release_fiq(&fh);
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imx_pcm_free(pcm);
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}
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static struct snd_soc_platform_driver imx_soc_platform_fiq = {
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.ops = &imx_pcm_ops,
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.pcm_new = imx_pcm_fiq_new,
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.pcm_free = imx_pcm_fiq_free,
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};
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int imx_pcm_fiq_init(struct platform_device *pdev,
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struct imx_pcm_fiq_params *params)
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{
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int ret;
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ret = claim_fiq(&fh);
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if (ret) {
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dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
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return ret;
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}
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mxc_set_irq_fiq(params->irq, 1);
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ssi_irq = params->irq;
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imx_pcm_fiq = params->irq;
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imx_ssi_fiq_base = (unsigned long)params->base;
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params->dma_params_tx->maxburst = 4;
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params->dma_params_rx->maxburst = 6;
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ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
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if (ret)
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goto failed_register;
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return 0;
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failed_register:
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mxc_set_irq_fiq(ssi_irq, 0);
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release_fiq(&fh);
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return ret;
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}
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EXPORT_SYMBOL_GPL(imx_pcm_fiq_init);
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void imx_pcm_fiq_exit(struct platform_device *pdev)
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{
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snd_soc_unregister_platform(&pdev->dev);
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}
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EXPORT_SYMBOL_GPL(imx_pcm_fiq_exit);
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MODULE_LICENSE("GPL");
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