![Mauro Carvalho Chehab](/assets/img/avatar_default.png)
Rename all PCI drivers with their own directory under drivers/media/video into drivers/media/pci and update the building system. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
610 lines
17 KiB
C
610 lines
17 KiB
C
/*
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* cx18 functions for DVB support
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*
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* Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
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* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "cx18-version.h"
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#include "cx18-dvb.h"
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#include "cx18-io.h"
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#include "cx18-queue.h"
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#include "cx18-streams.h"
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#include "cx18-cards.h"
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#include "cx18-gpio.h"
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#include "s5h1409.h"
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#include "mxl5005s.h"
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#include "s5h1411.h"
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#include "tda18271.h"
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#include "zl10353.h"
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#include <linux/firmware.h>
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#include "mt352.h"
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#include "mt352_priv.h"
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#include "tuner-xc2028.h"
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DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
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#define FWFILE "dvb-cx18-mpc718-mt352.fw"
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#define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000
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#define CX18_CLOCK_ENABLE2 0xc71024
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#define CX18_DMUX_CLK_MASK 0x0080
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/*
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* CX18_CARD_HVR_1600_ESMT
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* CX18_CARD_HVR_1600_SAMSUNG
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*/
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static struct mxl5005s_config hauppauge_hvr1600_tuner = {
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.i2c_address = 0xC6 >> 1,
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.if_freq = IF_FREQ_5380000HZ,
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.xtal_freq = CRYSTAL_FREQ_16000000HZ,
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.agc_mode = MXL_SINGLE_AGC,
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.tracking_filter = MXL_TF_C_H,
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.rssi_enable = MXL_RSSI_ENABLE,
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.cap_select = MXL_CAP_SEL_ENABLE,
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.div_out = MXL_DIV_OUT_4,
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.clock_out = MXL_CLOCK_OUT_DISABLE,
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.output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM,
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.top = MXL5005S_TOP_25P2,
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.mod_mode = MXL_DIGITAL_MODE,
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.if_mode = MXL_ZERO_IF,
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.qam_gain = 0x02,
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.AgcMasterByte = 0x00,
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};
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static struct s5h1409_config hauppauge_hvr1600_config = {
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.demod_address = 0x32 >> 1,
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.output_mode = S5H1409_SERIAL_OUTPUT,
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.gpio = S5H1409_GPIO_ON,
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.qam_if = 44000,
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.inversion = S5H1409_INVERSION_OFF,
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.status_mode = S5H1409_DEMODLOCKING,
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.mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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.hvr1600_opt = S5H1409_HVR1600_OPTIMIZE
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};
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/*
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* CX18_CARD_HVR_1600_S5H1411
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*/
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static struct s5h1411_config hcw_s5h1411_config = {
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.output_mode = S5H1411_SERIAL_OUTPUT,
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.gpio = S5H1411_GPIO_OFF,
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.vsb_if = S5H1411_IF_44000,
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.qam_if = S5H1411_IF_4000,
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.inversion = S5H1411_INVERSION_ON,
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.status_mode = S5H1411_DEMODLOCKING,
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.mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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};
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static struct tda18271_std_map hauppauge_tda18271_std_map = {
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.atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
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.if_lvl = 6, .rfagc_top = 0x37 },
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.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
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.if_lvl = 6, .rfagc_top = 0x37 },
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};
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static struct tda18271_config hauppauge_tda18271_config = {
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.std_map = &hauppauge_tda18271_std_map,
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.gate = TDA18271_GATE_DIGITAL,
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.output_opt = TDA18271_OUTPUT_LT_OFF,
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};
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/*
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* CX18_CARD_LEADTEK_DVR3100H
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*/
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/* Information/confirmation of proper config values provided by Terry Wu */
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static struct zl10353_config leadtek_dvr3100h_demod = {
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.demod_address = 0x1e >> 1, /* Datasheet suggested straps */
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.if2 = 45600, /* 4.560 MHz IF from the XC3028 */
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.parallel_ts = 1, /* Not a serial TS */
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.no_tuner = 1, /* XC3028 is not behind the gate */
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.disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
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};
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/*
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* CX18_CARD_YUAN_MPC718
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*/
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/*
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* Due to
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*
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* 1. an absence of information on how to prgram the MT352
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* 2. the Linux mt352 module pushing MT352 initialzation off onto us here
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*
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* We have to use an init sequence that *you* must extract from the Windows
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* driver (yuanrap.sys) and which we load as a firmware.
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*
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* If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual
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* with chip programming details, then I can remove this annoyance.
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*/
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static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream,
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const struct firmware **fw)
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{
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struct cx18 *cx = stream->cx;
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const char *fn = FWFILE;
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int ret;
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ret = request_firmware(fw, fn, &cx->pci_dev->dev);
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if (ret)
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CX18_ERR("Unable to open firmware file %s\n", fn);
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else {
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size_t sz = (*fw)->size;
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if (sz < 2 || sz > 64 || (sz % 2) != 0) {
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CX18_ERR("Firmware %s has a bad size: %lu bytes\n",
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fn, (unsigned long) sz);
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ret = -EILSEQ;
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release_firmware(*fw);
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*fw = NULL;
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}
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}
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if (ret) {
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CX18_ERR("The MPC718 board variant with the MT352 DVB-T"
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"demodualtor will not work without it\n");
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CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware "
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"mpc718' if you need the firmware\n");
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}
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return ret;
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}
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static int yuan_mpc718_mt352_init(struct dvb_frontend *fe)
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{
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struct cx18_dvb *dvb = container_of(fe->dvb,
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struct cx18_dvb, dvb_adapter);
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struct cx18_stream *stream = dvb->stream;
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const struct firmware *fw = NULL;
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int ret;
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int i;
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u8 buf[3];
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ret = yuan_mpc718_mt352_reqfw(stream, &fw);
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if (ret)
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return ret;
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/* Loop through all the register-value pairs in the firmware file */
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for (i = 0; i < fw->size; i += 2) {
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buf[0] = fw->data[i];
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/* Intercept a few registers we want to set ourselves */
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switch (buf[0]) {
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case TRL_NOMINAL_RATE_0:
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/* Set our custom OFDM bandwidth in the case below */
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break;
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case TRL_NOMINAL_RATE_1:
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/* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */
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/* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */
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/* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */
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buf[1] = 0x72;
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buf[2] = 0x49;
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mt352_write(fe, buf, 3);
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break;
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case INPUT_FREQ_0:
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/* Set our custom IF in the case below */
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break;
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case INPUT_FREQ_1:
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/* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */
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buf[1] = 0x31;
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buf[2] = 0xc0;
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mt352_write(fe, buf, 3);
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break;
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default:
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/* Pass through the register-value pair from the fw */
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buf[1] = fw->data[i+1];
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mt352_write(fe, buf, 2);
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break;
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}
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}
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buf[0] = (u8) TUNER_GO;
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buf[1] = 0x01; /* Go */
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mt352_write(fe, buf, 2);
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release_firmware(fw);
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return 0;
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}
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static struct mt352_config yuan_mpc718_mt352_demod = {
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.demod_address = 0x1e >> 1,
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.adc_clock = 20480, /* 20.480 MHz */
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.if2 = 4560, /* 4.560 MHz */
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.no_tuner = 1, /* XC3028 is not behind the gate */
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.demod_init = yuan_mpc718_mt352_init,
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};
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static struct zl10353_config yuan_mpc718_zl10353_demod = {
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.demod_address = 0x1e >> 1, /* Datasheet suggested straps */
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.if2 = 45600, /* 4.560 MHz IF from the XC3028 */
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.parallel_ts = 1, /* Not a serial TS */
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.no_tuner = 1, /* XC3028 is not behind the gate */
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.disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
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};
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static struct zl10353_config gotview_dvd3_zl10353_demod = {
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.demod_address = 0x1e >> 1, /* Datasheet suggested straps */
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.if2 = 45600, /* 4.560 MHz IF from the XC3028 */
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.parallel_ts = 1, /* Not a serial TS */
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.no_tuner = 1, /* XC3028 is not behind the gate */
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.disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
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};
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static int dvb_register(struct cx18_stream *stream);
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/* Kernel DVB framework calls this when the feed needs to start.
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* The CX18 framework should enable the transport DMA handling
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* and queue processing.
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*/
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static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
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{
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struct dvb_demux *demux = feed->demux;
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struct cx18_stream *stream = (struct cx18_stream *) demux->priv;
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struct cx18 *cx;
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int ret;
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u32 v;
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if (!stream)
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return -EINVAL;
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cx = stream->cx;
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CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n",
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feed->pid, feed->index);
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mutex_lock(&cx->serialize_lock);
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ret = cx18_init_on_first_open(cx);
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mutex_unlock(&cx->serialize_lock);
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if (ret) {
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CX18_ERR("Failed to initialize firmware starting DVB feed\n");
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return ret;
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}
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ret = -EINVAL;
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switch (cx->card->type) {
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case CX18_CARD_HVR_1600_ESMT:
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case CX18_CARD_HVR_1600_SAMSUNG:
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case CX18_CARD_HVR_1600_S5H1411:
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v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
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v |= 0x00400000; /* Serial Mode */
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v |= 0x00002000; /* Data Length - Byte */
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v |= 0x00010000; /* Error - Polarity */
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v |= 0x00020000; /* Error - Passthru */
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v |= 0x000c0000; /* Error - Ignore */
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cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
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break;
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case CX18_CARD_LEADTEK_DVR3100H:
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case CX18_CARD_YUAN_MPC718:
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case CX18_CARD_GOTVIEW_PCI_DVD3:
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default:
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/* Assumption - Parallel transport - Signalling
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* undefined or default.
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*/
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break;
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}
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if (!demux->dmx.frontend)
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return -EINVAL;
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mutex_lock(&stream->dvb->feedlock);
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if (stream->dvb->feeding++ == 0) {
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CX18_DEBUG_INFO("Starting Transport DMA\n");
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mutex_lock(&cx->serialize_lock);
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set_bit(CX18_F_S_STREAMING, &stream->s_flags);
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ret = cx18_start_v4l2_encode_stream(stream);
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if (ret < 0) {
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CX18_DEBUG_INFO("Failed to start Transport DMA\n");
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stream->dvb->feeding--;
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if (stream->dvb->feeding == 0)
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clear_bit(CX18_F_S_STREAMING, &stream->s_flags);
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}
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mutex_unlock(&cx->serialize_lock);
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} else
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ret = 0;
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mutex_unlock(&stream->dvb->feedlock);
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return ret;
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}
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/* Kernel DVB framework calls this when the feed needs to stop. */
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static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed)
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{
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struct dvb_demux *demux = feed->demux;
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struct cx18_stream *stream = (struct cx18_stream *)demux->priv;
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struct cx18 *cx;
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int ret = -EINVAL;
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if (stream) {
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cx = stream->cx;
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CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
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feed->pid, feed->index);
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mutex_lock(&stream->dvb->feedlock);
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if (--stream->dvb->feeding == 0) {
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CX18_DEBUG_INFO("Stopping Transport DMA\n");
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mutex_lock(&cx->serialize_lock);
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ret = cx18_stop_v4l2_encode_stream(stream, 0);
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mutex_unlock(&cx->serialize_lock);
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} else
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ret = 0;
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mutex_unlock(&stream->dvb->feedlock);
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}
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return ret;
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}
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int cx18_dvb_register(struct cx18_stream *stream)
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{
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struct cx18 *cx = stream->cx;
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struct cx18_dvb *dvb = stream->dvb;
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struct dvb_adapter *dvb_adapter;
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struct dvb_demux *dvbdemux;
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struct dmx_demux *dmx;
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int ret;
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if (!dvb)
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return -EINVAL;
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dvb->enabled = 0;
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dvb->stream = stream;
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ret = dvb_register_adapter(&dvb->dvb_adapter,
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CX18_DRIVER_NAME,
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THIS_MODULE, &cx->pci_dev->dev, adapter_nr);
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if (ret < 0)
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goto err_out;
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dvb_adapter = &dvb->dvb_adapter;
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dvbdemux = &dvb->demux;
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dvbdemux->priv = (void *)stream;
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dvbdemux->filternum = 256;
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dvbdemux->feednum = 256;
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dvbdemux->start_feed = cx18_dvb_start_feed;
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dvbdemux->stop_feed = cx18_dvb_stop_feed;
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dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
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DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
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ret = dvb_dmx_init(dvbdemux);
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if (ret < 0)
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goto err_dvb_unregister_adapter;
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dmx = &dvbdemux->dmx;
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dvb->hw_frontend.source = DMX_FRONTEND_0;
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dvb->mem_frontend.source = DMX_MEMORY_FE;
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dvb->dmxdev.filternum = 256;
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dvb->dmxdev.demux = dmx;
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ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter);
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if (ret < 0)
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goto err_dvb_dmx_release;
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ret = dmx->add_frontend(dmx, &dvb->hw_frontend);
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if (ret < 0)
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goto err_dvb_dmxdev_release;
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ret = dmx->add_frontend(dmx, &dvb->mem_frontend);
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if (ret < 0)
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goto err_remove_hw_frontend;
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ret = dmx->connect_frontend(dmx, &dvb->hw_frontend);
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if (ret < 0)
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goto err_remove_mem_frontend;
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ret = dvb_register(stream);
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if (ret < 0)
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goto err_disconnect_frontend;
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dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx);
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CX18_INFO("DVB Frontend registered\n");
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CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n",
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stream->dvb->dvb_adapter.num, stream->name,
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stream->buffers, stream->buf_size/1024,
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(stream->buf_size * 100 / 1024) % 100);
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mutex_init(&dvb->feedlock);
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dvb->enabled = 1;
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return ret;
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err_disconnect_frontend:
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dmx->disconnect_frontend(dmx);
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err_remove_mem_frontend:
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dmx->remove_frontend(dmx, &dvb->mem_frontend);
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err_remove_hw_frontend:
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dmx->remove_frontend(dmx, &dvb->hw_frontend);
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err_dvb_dmxdev_release:
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dvb_dmxdev_release(&dvb->dmxdev);
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err_dvb_dmx_release:
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dvb_dmx_release(dvbdemux);
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err_dvb_unregister_adapter:
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dvb_unregister_adapter(dvb_adapter);
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err_out:
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return ret;
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}
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void cx18_dvb_unregister(struct cx18_stream *stream)
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{
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struct cx18 *cx = stream->cx;
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struct cx18_dvb *dvb = stream->dvb;
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struct dvb_adapter *dvb_adapter;
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struct dvb_demux *dvbdemux;
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struct dmx_demux *dmx;
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CX18_INFO("unregister DVB\n");
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if (dvb == NULL || !dvb->enabled)
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return;
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dvb_adapter = &dvb->dvb_adapter;
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dvbdemux = &dvb->demux;
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dmx = &dvbdemux->dmx;
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dmx->close(dmx);
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dvb_net_release(&dvb->dvbnet);
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dmx->remove_frontend(dmx, &dvb->mem_frontend);
|
|
dmx->remove_frontend(dmx, &dvb->hw_frontend);
|
|
dvb_dmxdev_release(&dvb->dmxdev);
|
|
dvb_dmx_release(dvbdemux);
|
|
dvb_unregister_frontend(dvb->fe);
|
|
dvb_frontend_detach(dvb->fe);
|
|
dvb_unregister_adapter(dvb_adapter);
|
|
}
|
|
|
|
/* All the DVB attach calls go here, this function get's modified
|
|
* for each new card. cx18_dvb_start_feed() will also need changes.
|
|
*/
|
|
static int dvb_register(struct cx18_stream *stream)
|
|
{
|
|
struct cx18_dvb *dvb = stream->dvb;
|
|
struct cx18 *cx = stream->cx;
|
|
int ret = 0;
|
|
|
|
switch (cx->card->type) {
|
|
case CX18_CARD_HVR_1600_ESMT:
|
|
case CX18_CARD_HVR_1600_SAMSUNG:
|
|
dvb->fe = dvb_attach(s5h1409_attach,
|
|
&hauppauge_hvr1600_config,
|
|
&cx->i2c_adap[0]);
|
|
if (dvb->fe != NULL) {
|
|
dvb_attach(mxl5005s_attach, dvb->fe,
|
|
&cx->i2c_adap[0],
|
|
&hauppauge_hvr1600_tuner);
|
|
ret = 0;
|
|
}
|
|
break;
|
|
case CX18_CARD_HVR_1600_S5H1411:
|
|
dvb->fe = dvb_attach(s5h1411_attach,
|
|
&hcw_s5h1411_config,
|
|
&cx->i2c_adap[0]);
|
|
if (dvb->fe != NULL)
|
|
dvb_attach(tda18271_attach, dvb->fe,
|
|
0x60, &cx->i2c_adap[0],
|
|
&hauppauge_tda18271_config);
|
|
break;
|
|
case CX18_CARD_LEADTEK_DVR3100H:
|
|
dvb->fe = dvb_attach(zl10353_attach,
|
|
&leadtek_dvr3100h_demod,
|
|
&cx->i2c_adap[1]);
|
|
if (dvb->fe != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &cx->i2c_adap[1],
|
|
.i2c_addr = 0xc2 >> 1,
|
|
.ctrl = NULL,
|
|
};
|
|
static struct xc2028_ctrl ctrl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
.type = XC2028_AUTO,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctrl);
|
|
}
|
|
break;
|
|
case CX18_CARD_YUAN_MPC718:
|
|
/*
|
|
* TODO
|
|
* Apparently, these cards also could instead have a
|
|
* DiBcom demod supported by one of the db7000 drivers
|
|
*/
|
|
dvb->fe = dvb_attach(mt352_attach,
|
|
&yuan_mpc718_mt352_demod,
|
|
&cx->i2c_adap[1]);
|
|
if (dvb->fe == NULL)
|
|
dvb->fe = dvb_attach(zl10353_attach,
|
|
&yuan_mpc718_zl10353_demod,
|
|
&cx->i2c_adap[1]);
|
|
if (dvb->fe != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &cx->i2c_adap[1],
|
|
.i2c_addr = 0xc2 >> 1,
|
|
.ctrl = NULL,
|
|
};
|
|
static struct xc2028_ctrl ctrl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
.type = XC2028_AUTO,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctrl);
|
|
}
|
|
break;
|
|
case CX18_CARD_GOTVIEW_PCI_DVD3:
|
|
dvb->fe = dvb_attach(zl10353_attach,
|
|
&gotview_dvd3_zl10353_demod,
|
|
&cx->i2c_adap[1]);
|
|
if (dvb->fe != NULL) {
|
|
struct dvb_frontend *fe;
|
|
struct xc2028_config cfg = {
|
|
.i2c_adap = &cx->i2c_adap[1],
|
|
.i2c_addr = 0xc2 >> 1,
|
|
.ctrl = NULL,
|
|
};
|
|
static struct xc2028_ctrl ctrl = {
|
|
.fname = XC2028_DEFAULT_FIRMWARE,
|
|
.max_len = 64,
|
|
.demod = XC3028_FE_ZARLINK456,
|
|
.type = XC2028_AUTO,
|
|
};
|
|
|
|
fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
|
|
if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
|
|
fe->ops.tuner_ops.set_config(fe, &ctrl);
|
|
}
|
|
break;
|
|
default:
|
|
/* No Digital Tv Support */
|
|
break;
|
|
}
|
|
|
|
if (dvb->fe == NULL) {
|
|
CX18_ERR("frontend initialization failed\n");
|
|
return -1;
|
|
}
|
|
|
|
dvb->fe->callback = cx18_reset_tuner_gpio;
|
|
|
|
ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe);
|
|
if (ret < 0) {
|
|
if (dvb->fe->ops.release)
|
|
dvb->fe->ops.release(dvb->fe);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* The firmware seems to enable the TS DMUX clock
|
|
* under various circumstances. However, since we know we
|
|
* might use it, let's just turn it on ourselves here.
|
|
*/
|
|
cx18_write_reg_expect(cx,
|
|
(CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK,
|
|
CX18_CLOCK_ENABLE2,
|
|
CX18_DMUX_CLK_MASK,
|
|
(CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK);
|
|
|
|
return ret;
|
|
}
|
|
|
|
MODULE_FIRMWARE(FWFILE);
|