![Christophe Leroy](/assets/img/avatar_default.png)
On CPM1, when the SPI parameter RAM is relocated to somewhere else than the default location, in accordance with freescale documentation (refer micropatch SPI application note EB662), init RX/TX params command shall not be used because it doesn't take into account the new location, and overwrites data that is in original location of SPI param ram at addresses SCC2 param base + (u32*)0x88 (u16*)0x90 (u32*)0x98 (u16*)0xA0, hence breaking activity on SCC2 if SCC2 is used in a mode like QMC for instance. Therefore, the action shall be done manually as described by freescale and as was already partly done by the driver. Reported-by: Patrick Vasseur <patrick.vasseur@c-s.fr> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Tested-by: Patrick Vasseur <patrick.vasseur@c-s.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
392 lines
9.7 KiB
C
392 lines
9.7 KiB
C
/*
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* Freescale SPI controller driver cpm functions.
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*
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* Maintainer: Kumar Gala
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*
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* Copyright (C) 2006 Polycom, Inc.
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* Copyright 2010 Freescale Semiconductor, Inc.
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*
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* CPM SPI and QE buffer descriptors mode support:
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* Copyright (c) 2009 MontaVista Software, Inc.
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* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/cpm.h>
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#include <asm/qe.h>
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#include <linux/dma-mapping.h>
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#include <linux/fsl_devices.h>
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#include <linux/kernel.h>
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#include <linux/of_address.h>
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#include <linux/spi/spi.h>
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#include <linux/types.h>
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#include "spi-fsl-cpm.h"
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#include "spi-fsl-lib.h"
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#include "spi-fsl-spi.h"
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/* CPM1 and CPM2 are mutually exclusive. */
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#ifdef CONFIG_CPM1
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#include <asm/cpm1.h>
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#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_CH_SPI, 0)
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#else
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#include <asm/cpm2.h>
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#define CPM_SPI_CMD mk_cr_cmd(CPM_CR_SPI_PAGE, CPM_CR_SPI_SBLOCK, 0, 0)
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#endif
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#define SPIE_TXB 0x00000200 /* Last char is written to tx fifo */
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#define SPIE_RXB 0x00000100 /* Last char is written to rx buf */
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/* SPCOM register values */
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#define SPCOM_STR (1 << 23) /* Start transmit */
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#define SPI_PRAM_SIZE 0x100
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#define SPI_MRBLR ((unsigned int)PAGE_SIZE)
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static void *fsl_dummy_rx;
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static DEFINE_MUTEX(fsl_dummy_rx_lock);
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static int fsl_dummy_rx_refcnt;
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void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi)
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{
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if (mspi->flags & SPI_QE) {
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qe_issue_cmd(QE_INIT_TX_RX, mspi->subblock,
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QE_CR_PROTOCOL_UNSPECIFIED, 0);
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} else {
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if (mspi->flags & SPI_CPM1) {
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out_be32(&mspi->pram->rstate, 0);
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out_be16(&mspi->pram->rbptr,
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in_be16(&mspi->pram->rbase));
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out_be32(&mspi->pram->tstate, 0);
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out_be16(&mspi->pram->tbptr,
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in_be16(&mspi->pram->tbase));
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} else {
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cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX);
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}
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}
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}
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static void fsl_spi_cpm_bufs_start(struct mpc8xxx_spi *mspi)
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{
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struct cpm_buf_desc __iomem *tx_bd = mspi->tx_bd;
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struct cpm_buf_desc __iomem *rx_bd = mspi->rx_bd;
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unsigned int xfer_len = min(mspi->count, SPI_MRBLR);
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unsigned int xfer_ofs;
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struct fsl_spi_reg *reg_base = mspi->reg_base;
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xfer_ofs = mspi->xfer_in_progress->len - mspi->count;
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if (mspi->rx_dma == mspi->dma_dummy_rx)
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out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma);
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else
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out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma + xfer_ofs);
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out_be16(&rx_bd->cbd_datlen, 0);
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out_be16(&rx_bd->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT | BD_SC_WRAP);
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if (mspi->tx_dma == mspi->dma_dummy_tx)
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out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma);
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else
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out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma + xfer_ofs);
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out_be16(&tx_bd->cbd_datlen, xfer_len);
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out_be16(&tx_bd->cbd_sc, BD_SC_READY | BD_SC_INTRPT | BD_SC_WRAP |
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BD_SC_LAST);
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/* start transfer */
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mpc8xxx_spi_write_reg(®_base->command, SPCOM_STR);
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}
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int fsl_spi_cpm_bufs(struct mpc8xxx_spi *mspi,
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struct spi_transfer *t, bool is_dma_mapped)
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{
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struct device *dev = mspi->dev;
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struct fsl_spi_reg *reg_base = mspi->reg_base;
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if (is_dma_mapped) {
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mspi->map_tx_dma = 0;
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mspi->map_rx_dma = 0;
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} else {
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mspi->map_tx_dma = 1;
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mspi->map_rx_dma = 1;
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}
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if (!t->tx_buf) {
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mspi->tx_dma = mspi->dma_dummy_tx;
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mspi->map_tx_dma = 0;
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}
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if (!t->rx_buf) {
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mspi->rx_dma = mspi->dma_dummy_rx;
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mspi->map_rx_dma = 0;
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}
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if (mspi->map_tx_dma) {
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void *nonconst_tx = (void *)mspi->tx; /* shut up gcc */
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mspi->tx_dma = dma_map_single(dev, nonconst_tx, t->len,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dev, mspi->tx_dma)) {
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dev_err(dev, "unable to map tx dma\n");
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return -ENOMEM;
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}
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} else if (t->tx_buf) {
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mspi->tx_dma = t->tx_dma;
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}
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if (mspi->map_rx_dma) {
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mspi->rx_dma = dma_map_single(dev, mspi->rx, t->len,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(dev, mspi->rx_dma)) {
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dev_err(dev, "unable to map rx dma\n");
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goto err_rx_dma;
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}
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} else if (t->rx_buf) {
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mspi->rx_dma = t->rx_dma;
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}
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/* enable rx ints */
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mpc8xxx_spi_write_reg(®_base->mask, SPIE_RXB);
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mspi->xfer_in_progress = t;
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mspi->count = t->len;
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/* start CPM transfers */
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fsl_spi_cpm_bufs_start(mspi);
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return 0;
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err_rx_dma:
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if (mspi->map_tx_dma)
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dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
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return -ENOMEM;
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}
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void fsl_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi)
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{
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struct device *dev = mspi->dev;
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struct spi_transfer *t = mspi->xfer_in_progress;
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if (mspi->map_tx_dma)
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dma_unmap_single(dev, mspi->tx_dma, t->len, DMA_TO_DEVICE);
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if (mspi->map_rx_dma)
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dma_unmap_single(dev, mspi->rx_dma, t->len, DMA_FROM_DEVICE);
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mspi->xfer_in_progress = NULL;
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}
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void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events)
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{
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u16 len;
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struct fsl_spi_reg *reg_base = mspi->reg_base;
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dev_dbg(mspi->dev, "%s: bd datlen %d, count %d\n", __func__,
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in_be16(&mspi->rx_bd->cbd_datlen), mspi->count);
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len = in_be16(&mspi->rx_bd->cbd_datlen);
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if (len > mspi->count) {
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WARN_ON(1);
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len = mspi->count;
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}
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/* Clear the events */
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mpc8xxx_spi_write_reg(®_base->event, events);
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mspi->count -= len;
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if (mspi->count)
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fsl_spi_cpm_bufs_start(mspi);
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else
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complete(&mspi->done);
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}
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static void *fsl_spi_alloc_dummy_rx(void)
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{
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mutex_lock(&fsl_dummy_rx_lock);
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if (!fsl_dummy_rx)
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fsl_dummy_rx = kmalloc(SPI_MRBLR, GFP_KERNEL);
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if (fsl_dummy_rx)
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fsl_dummy_rx_refcnt++;
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mutex_unlock(&fsl_dummy_rx_lock);
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return fsl_dummy_rx;
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}
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static void fsl_spi_free_dummy_rx(void)
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{
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mutex_lock(&fsl_dummy_rx_lock);
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switch (fsl_dummy_rx_refcnt) {
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case 0:
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WARN_ON(1);
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break;
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case 1:
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kfree(fsl_dummy_rx);
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fsl_dummy_rx = NULL;
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/* fall through */
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default:
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fsl_dummy_rx_refcnt--;
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break;
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}
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mutex_unlock(&fsl_dummy_rx_lock);
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}
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static unsigned long fsl_spi_cpm_get_pram(struct mpc8xxx_spi *mspi)
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{
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struct device *dev = mspi->dev;
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struct device_node *np = dev->of_node;
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const u32 *iprop;
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int size;
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void __iomem *spi_base;
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unsigned long pram_ofs = -ENOMEM;
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/* Can't use of_address_to_resource(), QE muram isn't at 0. */
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iprop = of_get_property(np, "reg", &size);
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/* QE with a fixed pram location? */
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if (mspi->flags & SPI_QE && iprop && size == sizeof(*iprop) * 4)
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return cpm_muram_alloc_fixed(iprop[2], SPI_PRAM_SIZE);
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/* QE but with a dynamic pram location? */
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if (mspi->flags & SPI_QE) {
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pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
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qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, mspi->subblock,
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QE_CR_PROTOCOL_UNSPECIFIED, pram_ofs);
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return pram_ofs;
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}
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spi_base = of_iomap(np, 1);
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if (spi_base == NULL)
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return -EINVAL;
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if (mspi->flags & SPI_CPM2) {
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pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
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out_be16(spi_base, pram_ofs);
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} else {
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struct spi_pram __iomem *pram = spi_base;
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u16 rpbase = in_be16(&pram->rpbase);
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/* Microcode relocation patch applied? */
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if (rpbase) {
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pram_ofs = rpbase;
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} else {
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pram_ofs = cpm_muram_alloc(SPI_PRAM_SIZE, 64);
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out_be16(spi_base, pram_ofs);
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}
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}
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iounmap(spi_base);
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return pram_ofs;
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}
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int fsl_spi_cpm_init(struct mpc8xxx_spi *mspi)
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{
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struct device *dev = mspi->dev;
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struct device_node *np = dev->of_node;
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const u32 *iprop;
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int size;
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unsigned long pram_ofs;
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unsigned long bds_ofs;
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if (!(mspi->flags & SPI_CPM_MODE))
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return 0;
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if (!fsl_spi_alloc_dummy_rx())
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return -ENOMEM;
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if (mspi->flags & SPI_QE) {
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iprop = of_get_property(np, "cell-index", &size);
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if (iprop && size == sizeof(*iprop))
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mspi->subblock = *iprop;
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switch (mspi->subblock) {
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default:
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dev_warn(dev, "cell-index unspecified, assuming SPI1\n");
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/* fall through */
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case 0:
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mspi->subblock = QE_CR_SUBBLOCK_SPI1;
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break;
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case 1:
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mspi->subblock = QE_CR_SUBBLOCK_SPI2;
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break;
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}
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}
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pram_ofs = fsl_spi_cpm_get_pram(mspi);
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if (IS_ERR_VALUE(pram_ofs)) {
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dev_err(dev, "can't allocate spi parameter ram\n");
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goto err_pram;
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}
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bds_ofs = cpm_muram_alloc(sizeof(*mspi->tx_bd) +
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sizeof(*mspi->rx_bd), 8);
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if (IS_ERR_VALUE(bds_ofs)) {
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dev_err(dev, "can't allocate bds\n");
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goto err_bds;
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}
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mspi->dma_dummy_tx = dma_map_single(dev, empty_zero_page, PAGE_SIZE,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dev, mspi->dma_dummy_tx)) {
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dev_err(dev, "unable to map dummy tx buffer\n");
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goto err_dummy_tx;
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}
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mspi->dma_dummy_rx = dma_map_single(dev, fsl_dummy_rx, SPI_MRBLR,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(dev, mspi->dma_dummy_rx)) {
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dev_err(dev, "unable to map dummy rx buffer\n");
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goto err_dummy_rx;
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}
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mspi->pram = cpm_muram_addr(pram_ofs);
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mspi->tx_bd = cpm_muram_addr(bds_ofs);
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mspi->rx_bd = cpm_muram_addr(bds_ofs + sizeof(*mspi->tx_bd));
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/* Initialize parameter ram. */
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out_be16(&mspi->pram->tbase, cpm_muram_offset(mspi->tx_bd));
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out_be16(&mspi->pram->rbase, cpm_muram_offset(mspi->rx_bd));
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out_8(&mspi->pram->tfcr, CPMFCR_EB | CPMFCR_GBL);
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out_8(&mspi->pram->rfcr, CPMFCR_EB | CPMFCR_GBL);
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out_be16(&mspi->pram->mrblr, SPI_MRBLR);
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out_be32(&mspi->pram->rstate, 0);
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out_be32(&mspi->pram->rdp, 0);
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out_be16(&mspi->pram->rbptr, 0);
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out_be16(&mspi->pram->rbc, 0);
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out_be32(&mspi->pram->rxtmp, 0);
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out_be32(&mspi->pram->tstate, 0);
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out_be32(&mspi->pram->tdp, 0);
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out_be16(&mspi->pram->tbptr, 0);
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out_be16(&mspi->pram->tbc, 0);
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out_be32(&mspi->pram->txtmp, 0);
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return 0;
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err_dummy_rx:
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dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
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err_dummy_tx:
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cpm_muram_free(bds_ofs);
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err_bds:
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cpm_muram_free(pram_ofs);
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err_pram:
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fsl_spi_free_dummy_rx();
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return -ENOMEM;
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}
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void fsl_spi_cpm_free(struct mpc8xxx_spi *mspi)
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{
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struct device *dev = mspi->dev;
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if (!(mspi->flags & SPI_CPM_MODE))
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return;
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dma_unmap_single(dev, mspi->dma_dummy_rx, SPI_MRBLR, DMA_FROM_DEVICE);
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dma_unmap_single(dev, mspi->dma_dummy_tx, PAGE_SIZE, DMA_TO_DEVICE);
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cpm_muram_free(cpm_muram_offset(mspi->tx_bd));
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cpm_muram_free(cpm_muram_offset(mspi->pram));
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fsl_spi_free_dummy_rx();
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}
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