c4574aa00e
There are general changes pending to make the /aliases/serial* entries number the serial ports on the system. On Tegra, so far the ports have been just numbered dynamically as they are configured so that makes them change. To avoid this, add specific aliases per board to keep the old numbers. This allows us to change the numbering by default on future SoCs while keeping the numbering on existing boards. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Thierry Reding <treding@nvidia.com>
209 lines
3.9 KiB
Plaintext
209 lines
3.9 KiB
Plaintext
/dts-v1/;
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#include "tegra30-colibri.dtsi"
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/ {
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model = "Toradex Colibri T30 on Colibri Evaluation Board";
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compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30", "nvidia,tegra30";
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aliases {
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rtc0 = "/i2c@7000c000/rtc@68";
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rtc1 = "/i2c@7000d000/tps65911@2d";
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rtc2 = "/rtc@7000e000";
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serial0 = &uarta;
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serial1 = &uartb;
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serial2 = &uartd;
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};
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host1x@50000000 {
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dc@54200000 {
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rgb {
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status = "okay";
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nvidia,panel = <&panel>;
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};
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};
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hdmi@54280000 {
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status = "okay";
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};
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};
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serial@70006000 {
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status = "okay";
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};
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serial@70006040 {
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compatible = "nvidia,tegra30-hsuart";
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status = "okay";
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};
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serial@70006300 {
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compatible = "nvidia,tegra30-hsuart";
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status = "okay";
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};
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pwm@7000a000 {
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status = "okay";
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};
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/*
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* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
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* board)
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*/
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i2c@7000c000 {
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status = "okay";
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clock-frequency = <100000>;
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/* M41T0M6 real time clock on carrier board */
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rtc@68 {
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compatible = "stm,m41t00";
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reg = <0x68>;
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};
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};
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/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
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hdmiddc: i2c@7000c700 {
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status = "okay";
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};
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/* SPI1: Colibri SSP */
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spi@7000d400 {
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status = "okay";
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spi-max-frequency = <25000000>;
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can0: can@0 {
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compatible = "microchip,mcp2515";
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reg = <0>;
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clocks = <&clk16m>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
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spi-max-frequency = <10000000>;
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};
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spidev0: spi@1 {
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compatible = "spidev";
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reg = <1>;
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spi-max-frequency = <25000000>;
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};
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};
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sdhci@78000200 {
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status = "okay";
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bus-width = <4>;
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cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
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no-1-8-v;
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};
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/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
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usb@7d000000 {
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status = "okay";
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};
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usb-phy@7d000000 {
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status = "okay";
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dr_mode = "otg";
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vbus-supply = <&usbc_vbus_reg>;
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};
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/* EHCI instance 2: USB3_DP/N -> USBH_P/N */
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usb@7d008000 {
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status = "okay";
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};
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usb-phy@7d008000 {
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status = "okay";
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vbus-supply = <&usbh_vbus_reg>;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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/* PWM<A> */
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pwms = <&pwm 0 5000000>;
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brightness-levels = <255 128 64 32 16 8 4 0>;
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default-brightness-level = <6>;
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/* BL_ON */
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enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
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};
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clocks {
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clk16m: clk@1 {
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compatible = "fixed-clock";
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reg=<1>;
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#clock-cells = <0>;
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clock-frequency = <16000000>;
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clock-output-names = "clk16m";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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power {
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label = "Power";
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gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_POWER>;
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debounce-interval = <10>;
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gpio-key,wakeup;
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};
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};
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panel: panel {
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/*
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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*/
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compatible = "edt,et057090dhu", "simple-panel";
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backlight = <&backlight>;
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};
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pwmleds {
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compatible = "pwm-leds";
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pwmb {
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label = "PWM<B>";
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pwms = <&pwm 1 19600>;
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max-brightness = <255>;
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};
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pwmc {
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label = "PWM<C>";
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pwms = <&pwm 2 19600>;
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max-brightness = <255>;
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};
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pwmd {
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label = "PWM<D>";
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pwms = <&pwm 3 19600>;
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max-brightness = <255>;
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};
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};
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regulators {
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sys_5v0_reg: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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usbc_vbus_reg: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "usbc_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&sys_5v0_reg>;
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};
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/* USBH_PEN */
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usbh_vbus_reg: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "usbh_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
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vin-supply = <&sys_5v0_reg>;
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};
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};
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};
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