1d65b1c886
The QS21/22 IBM Cell blades had a southbridge chip called Axon. This
could have DDR DIMMs attached to it, though they were not directly
usable as RAM, instead they could be used as some sort of buffer, if
applications were written specifically to use the block device
provided by the driver.
Although the driver supposedly had direct access support, it was
apparently never tested (see commit 91117a2024 ("axonram: Fix bug in
direct_access")).
These machines have not been available for over 5 years, and were
never widely in use. It seems highly unlikely anyone is using this
driver.
In general we're happy to leave old drivers in the tree, but because
DAX is involved this driver is caught up in the ongoing work in that
area, but none of the DAX folks are able to test it.
So remove the driver, if any one *is* using it, we'll be happy to put
it back.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
68 lines
2.3 KiB
Makefile
68 lines
2.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
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mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o
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obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
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obj-$(CONFIG_MPIC_TIMER) += mpic_timer.o
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obj-$(CONFIG_FSL_MPIC_TIMER_WAKEUP) += fsl_mpic_timer_wakeup.o
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mpic-msgr-obj-$(CONFIG_MPIC_MSGR) += mpic_msgr.o
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obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) $(mpic-msgr-obj-y)
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obj-$(CONFIG_PPC_EPAPR_HV_PIC) += ehv_pic.o
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fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
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obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o
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obj-$(CONFIG_PPC_MPC106) += grackle.o
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obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
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obj-$(CONFIG_PPC_PMI) += pmi.o
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obj-$(CONFIG_U3_DART) += dart_iommu.o
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obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
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obj-$(CONFIG_FSL_SOC) += fsl_soc.o fsl_mpic_err.o
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obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
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obj-$(CONFIG_FSL_PMC) += fsl_pmc.o
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obj-$(CONFIG_FSL_CORENET_RCPM) += fsl_rcpm.o
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obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
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obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
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obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
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obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o
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obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o
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obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
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mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
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obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
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mv64x60_udbg.o
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obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o
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obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
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obj-$(CONFIG_PPC_I8259) += i8259.o
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obj-$(CONFIG_IPIC) += ipic.o
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obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o
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obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o
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obj-$(CONFIG_OF_RTC) += of_rtc.o
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obj-$(CONFIG_CPM) += cpm_common.o
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obj-$(CONFIG_CPM1) += cpm1.o
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obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o cpm_gpio.o
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obj-$(CONFIG_8xx_GPIO) += cpm_gpio.o
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obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
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obj-$(CONFIG_PPC_DCR) += dcr.o
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obj-$(CONFIG_UCODE_PATCH) += micropatch.o
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obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o
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obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o
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ifeq ($(CONFIG_SUSPEND),y)
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obj-$(CONFIG_6xx) += 6xx-suspend.o
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endif
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obj-$(CONFIG_PPC_SCOM) += scom.o
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obj-$(CONFIG_PPC_EARLY_DEBUG_MEMCONS) += udbg_memcons.o
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subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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obj-$(CONFIG_PPC_XICS) += xics/
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obj-$(CONFIG_PPC_XIVE) += xive/
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obj-$(CONFIG_GE_FPGA) += ge/
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