![Christoph Lameter](/assets/img/avatar_default.png)
Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
726 lines
18 KiB
C
726 lines
18 KiB
C
/*
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* Intel Multimedia Timer device implementation for SGI SN platforms.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
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*
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* This driver exports an API that should be supportable by any HPET or IA-PC
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* multimedia timer. The code below is currently specific to the SGI Altix
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* SHub RTC, however.
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*
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* 11/01/01 - jbarnes - initial revision
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* 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
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* 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
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* 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
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* support via the posix timer interface
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/ioctl.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/devfs_fs_kernel.h>
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#include <linux/mmtimer.h>
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#include <linux/miscdevice.h>
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#include <linux/posix-timers.h>
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#include <linux/interrupt.h>
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#include <asm/uaccess.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/intr.h>
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/nodepda.h>
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#include <asm/sn/shubio.h>
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MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");
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MODULE_DESCRIPTION("SGI Altix RTC Timer");
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MODULE_LICENSE("GPL");
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/* name of the device, usually in /dev */
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#define MMTIMER_NAME "mmtimer"
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#define MMTIMER_DESC "SGI Altix RTC Timer"
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#define MMTIMER_VERSION "2.0"
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#define RTC_BITS 55 /* 55 bits for this implementation */
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extern unsigned long sn_rtc_cycles_per_second;
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#define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
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#define rtc_time() (*RTC_COUNTER_ADDR)
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static int mmtimer_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg);
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static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
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/*
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* Period in femtoseconds (10^-15 s)
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*/
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static unsigned long mmtimer_femtoperiod = 0;
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static struct file_operations mmtimer_fops = {
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.owner = THIS_MODULE,
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.mmap = mmtimer_mmap,
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.ioctl = mmtimer_ioctl,
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};
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/*
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* We only have comparison registers RTC1-4 currently available per
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* node. RTC0 is used by SAL.
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*/
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#define NUM_COMPARATORS 3
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/* Check for an RTC interrupt pending */
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static int inline mmtimer_int_pending(int comparator)
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{
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if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
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SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
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return 1;
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else
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return 0;
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}
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/* Clear the RTC interrupt pending bit */
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static void inline mmtimer_clr_int_pending(int comparator)
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{
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
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SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
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}
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/* Setup timer on comparator RTC1 */
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static void inline mmtimer_setup_int_0(u64 expires)
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{
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u64 val;
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/* Disable interrupt */
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
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/* Initialize comparator value */
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
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/* Clear pending bit */
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mmtimer_clr_int_pending(0);
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val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
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((u64)cpu_physical_id(smp_processor_id()) <<
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SH_RTC1_INT_CONFIG_PID_SHFT);
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/* Set configuration */
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
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/* Enable RTC interrupts */
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
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/* Initialize comparator value */
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
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}
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/* Setup timer on comparator RTC2 */
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static void inline mmtimer_setup_int_1(u64 expires)
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{
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u64 val;
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
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mmtimer_clr_int_pending(1);
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val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
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((u64)cpu_physical_id(smp_processor_id()) <<
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SH_RTC2_INT_CONFIG_PID_SHFT);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
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}
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/* Setup timer on comparator RTC3 */
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static void inline mmtimer_setup_int_2(u64 expires)
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{
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u64 val;
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
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mmtimer_clr_int_pending(2);
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val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
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((u64)cpu_physical_id(smp_processor_id()) <<
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SH_RTC3_INT_CONFIG_PID_SHFT);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
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HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
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}
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/*
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* This function must be called with interrupts disabled and preemption off
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* in order to insure that the setup succeeds in a deterministic time frame.
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* It will check if the interrupt setup succeeded.
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*/
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static int inline mmtimer_setup(int comparator, unsigned long expires)
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{
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switch (comparator) {
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case 0:
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mmtimer_setup_int_0(expires);
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break;
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case 1:
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mmtimer_setup_int_1(expires);
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break;
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case 2:
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mmtimer_setup_int_2(expires);
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break;
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}
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/* We might've missed our expiration time */
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if (rtc_time() < expires)
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return 1;
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/*
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* If an interrupt is already pending then its okay
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* if not then we failed
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*/
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return mmtimer_int_pending(comparator);
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}
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static int inline mmtimer_disable_int(long nasid, int comparator)
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{
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switch (comparator) {
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case 0:
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nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
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0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
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break;
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case 1:
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nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
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0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
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break;
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case 2:
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nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
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0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
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break;
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default:
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return -EFAULT;
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}
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return 0;
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}
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#define TIMER_OFF 0xbadcabLL
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/* There is one of these for each comparator */
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typedef struct mmtimer {
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spinlock_t lock ____cacheline_aligned;
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struct k_itimer *timer;
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int i;
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int cpu;
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struct tasklet_struct tasklet;
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} mmtimer_t;
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/*
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* Total number of comparators is comparators/node * MAX nodes/running kernel
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*/
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static mmtimer_t timers[NUM_COMPARATORS*MAX_COMPACT_NODES];
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/**
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* mmtimer_ioctl - ioctl interface for /dev/mmtimer
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* @inode: inode of the device
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* @file: file structure for the device
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* @cmd: command to execute
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* @arg: optional argument to command
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*
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* Executes the command specified by @cmd. Returns 0 for success, < 0 for
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* failure.
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*
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* Valid commands:
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*
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* %MMTIMER_GETOFFSET - Should return the offset (relative to the start
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* of the page where the registers are mapped) for the counter in question.
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*
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* %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
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* seconds
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*
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* %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
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* specified by @arg
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*
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* %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
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*
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* %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
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*
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* %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
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* in the address specified by @arg.
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*/
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static int mmtimer_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int ret = 0;
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switch (cmd) {
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case MMTIMER_GETOFFSET: /* offset of the counter */
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/*
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* SN RTC registers are on their own 64k page
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*/
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if(PAGE_SIZE <= (1 << 16))
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ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
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else
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ret = -ENOSYS;
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break;
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case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
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if(copy_to_user((unsigned long __user *)arg,
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&mmtimer_femtoperiod, sizeof(unsigned long)))
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return -EFAULT;
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break;
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case MMTIMER_GETFREQ: /* frequency in Hz */
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if(copy_to_user((unsigned long __user *)arg,
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&sn_rtc_cycles_per_second,
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sizeof(unsigned long)))
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return -EFAULT;
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ret = 0;
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break;
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case MMTIMER_GETBITS: /* number of bits in the clock */
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ret = RTC_BITS;
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break;
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case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
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ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
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break;
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case MMTIMER_GETCOUNTER:
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if(copy_to_user((unsigned long __user *)arg,
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RTC_COUNTER_ADDR, sizeof(unsigned long)))
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return -EFAULT;
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break;
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default:
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ret = -ENOSYS;
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break;
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}
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return ret;
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}
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/**
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* mmtimer_mmap - maps the clock's registers into userspace
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* @file: file structure for the device
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* @vma: VMA to map the registers into
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*
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* Calls remap_pfn_range() to map the clock's registers into
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* the calling process' address space.
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*/
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static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
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{
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unsigned long mmtimer_addr;
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if (vma->vm_end - vma->vm_start != PAGE_SIZE)
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return -EINVAL;
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if (vma->vm_flags & VM_WRITE)
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return -EPERM;
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if (PAGE_SIZE > (1 << 16))
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return -ENOSYS;
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vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED );
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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mmtimer_addr = __pa(RTC_COUNTER_ADDR);
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mmtimer_addr &= ~(PAGE_SIZE - 1);
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mmtimer_addr &= 0xfffffffffffffffUL;
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if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
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PAGE_SIZE, vma->vm_page_prot)) {
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printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
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return -EAGAIN;
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}
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return 0;
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}
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static struct miscdevice mmtimer_miscdev = {
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SGI_MMTIMER,
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MMTIMER_NAME,
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&mmtimer_fops
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};
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static struct timespec sgi_clock_offset;
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static int sgi_clock_period;
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/*
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* Posix Timer Interface
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*/
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static struct timespec sgi_clock_offset;
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static int sgi_clock_period;
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static int sgi_clock_get(clockid_t clockid, struct timespec *tp)
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{
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u64 nsec;
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nsec = rtc_time() * sgi_clock_period
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+ sgi_clock_offset.tv_nsec;
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tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
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+ sgi_clock_offset.tv_sec;
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return 0;
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};
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static int sgi_clock_set(clockid_t clockid, struct timespec *tp)
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{
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u64 nsec;
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u64 rem;
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nsec = rtc_time() * sgi_clock_period;
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sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
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if (rem <= tp->tv_nsec)
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sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
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else {
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sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
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sgi_clock_offset.tv_sec--;
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}
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return 0;
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}
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/*
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* Schedule the next periodic interrupt. This function will attempt
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* to schedule a periodic interrupt later if necessary. If the scheduling
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* of an interrupt fails then the time to skip is lengthened
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* exponentially in order to ensure that the next interrupt
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* can be properly scheduled..
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*/
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static int inline reschedule_periodic_timer(mmtimer_t *x)
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{
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int n;
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struct k_itimer *t = x->timer;
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t->it.mmtimer.clock = x->i;
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t->it_overrun--;
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n = 0;
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do {
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t->it.mmtimer.expires += t->it.mmtimer.incr << n;
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t->it_overrun += 1 << n;
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n++;
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if (n > 20)
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return 1;
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} while (!mmtimer_setup(x->i, t->it.mmtimer.expires));
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return 0;
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}
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/**
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* mmtimer_interrupt - timer interrupt handler
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* @irq: irq received
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* @dev_id: device the irq came from
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* @regs: register state upon receipt of the interrupt
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*
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* Called when one of the comarators matches the counter, This
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* routine will send signals to processes that have requested
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* them.
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*
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* This interrupt is run in an interrupt context
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* by the SHUB. It is therefore safe to locally access SHub
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* registers.
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*/
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static irqreturn_t
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mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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int i;
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mmtimer_t *base = timers + cpuid_to_cnodeid(smp_processor_id()) *
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NUM_COMPARATORS;
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unsigned long expires = 0;
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int result = IRQ_NONE;
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/*
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* Do this once for each comparison register
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*/
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for (i = 0; i < NUM_COMPARATORS; i++) {
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/* Make sure this doesn't get reused before tasklet_sched */
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spin_lock(&base[i].lock);
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if (base[i].cpu == smp_processor_id()) {
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if (base[i].timer)
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expires = base[i].timer->it.mmtimer.expires;
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/* expires test won't work with shared irqs */
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if ((mmtimer_int_pending(i) > 0) ||
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(expires && (expires < rtc_time()))) {
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mmtimer_clr_int_pending(i);
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tasklet_schedule(&base[i].tasklet);
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result = IRQ_HANDLED;
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}
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}
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spin_unlock(&base[i].lock);
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expires = 0;
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}
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return result;
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}
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void mmtimer_tasklet(unsigned long data) {
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mmtimer_t *x = (mmtimer_t *)data;
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struct k_itimer *t = x->timer;
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unsigned long flags;
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if (t == NULL)
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return;
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/* Send signal and deal with periodic signals */
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spin_lock_irqsave(&t->it_lock, flags);
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spin_lock(&x->lock);
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/* If timer was deleted between interrupt and here, leave */
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if (t != x->timer)
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goto out;
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t->it_overrun = 0;
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if (posix_timer_event(t, 0) != 0) {
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// printk(KERN_WARNING "mmtimer: cannot deliver signal.\n");
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t->it_overrun++;
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}
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if(t->it.mmtimer.incr) {
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/* Periodic timer */
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if (reschedule_periodic_timer(x)) {
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printk(KERN_WARNING "mmtimer: unable to reschedule\n");
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x->timer = NULL;
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}
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} else {
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/* Ensure we don't false trigger in mmtimer_interrupt */
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t->it.mmtimer.expires = 0;
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}
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t->it_overrun_last = t->it_overrun;
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out:
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spin_unlock(&x->lock);
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spin_unlock_irqrestore(&t->it_lock, flags);
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|
}
|
|
|
|
static int sgi_timer_create(struct k_itimer *timer)
|
|
{
|
|
/* Insure that a newly created timer is off */
|
|
timer->it.mmtimer.clock = TIMER_OFF;
|
|
return 0;
|
|
}
|
|
|
|
/* This does not really delete a timer. It just insures
|
|
* that the timer is not active
|
|
*
|
|
* Assumption: it_lock is already held with irq's disabled
|
|
*/
|
|
static int sgi_timer_del(struct k_itimer *timr)
|
|
{
|
|
int i = timr->it.mmtimer.clock;
|
|
cnodeid_t nodeid = timr->it.mmtimer.node;
|
|
mmtimer_t *t = timers + nodeid * NUM_COMPARATORS +i;
|
|
unsigned long irqflags;
|
|
|
|
if (i != TIMER_OFF) {
|
|
spin_lock_irqsave(&t->lock, irqflags);
|
|
mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
|
|
t->timer = NULL;
|
|
timr->it.mmtimer.clock = TIMER_OFF;
|
|
timr->it.mmtimer.expires = 0;
|
|
spin_unlock_irqrestore(&t->lock, irqflags);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
|
|
#define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)
|
|
|
|
/* Assumption: it_lock is already held with irq's disabled */
|
|
static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting)
|
|
{
|
|
|
|
if (timr->it.mmtimer.clock == TIMER_OFF) {
|
|
cur_setting->it_interval.tv_nsec = 0;
|
|
cur_setting->it_interval.tv_sec = 0;
|
|
cur_setting->it_value.tv_nsec = 0;
|
|
cur_setting->it_value.tv_sec =0;
|
|
return;
|
|
}
|
|
|
|
ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period);
|
|
ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period);
|
|
return;
|
|
}
|
|
|
|
|
|
static int sgi_timer_set(struct k_itimer *timr, int flags,
|
|
struct itimerspec * new_setting,
|
|
struct itimerspec * old_setting)
|
|
{
|
|
|
|
int i;
|
|
unsigned long when, period, irqflags;
|
|
int err = 0;
|
|
cnodeid_t nodeid;
|
|
mmtimer_t *base;
|
|
|
|
if (old_setting)
|
|
sgi_timer_get(timr, old_setting);
|
|
|
|
sgi_timer_del(timr);
|
|
when = timespec_to_ns(new_setting->it_value);
|
|
period = timespec_to_ns(new_setting->it_interval);
|
|
|
|
if (when == 0)
|
|
/* Clear timer */
|
|
return 0;
|
|
|
|
if (flags & TIMER_ABSTIME) {
|
|
struct timespec n;
|
|
unsigned long now;
|
|
|
|
getnstimeofday(&n);
|
|
now = timespec_to_ns(n);
|
|
if (when > now)
|
|
when -= now;
|
|
else
|
|
/* Fire the timer immediately */
|
|
when = 0;
|
|
}
|
|
|
|
/*
|
|
* Convert to sgi clock period. Need to keep rtc_time() as near as possible
|
|
* to getnstimeofday() in order to be as faithful as possible to the time
|
|
* specified.
|
|
*/
|
|
when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
|
|
period = (period + sgi_clock_period - 1) / sgi_clock_period;
|
|
|
|
/*
|
|
* We are allocating a local SHub comparator. If we would be moved to another
|
|
* cpu then another SHub may be local to us. Prohibit that by switching off
|
|
* preemption.
|
|
*/
|
|
preempt_disable();
|
|
|
|
nodeid = cpuid_to_cnodeid(smp_processor_id());
|
|
base = timers + nodeid * NUM_COMPARATORS;
|
|
retry:
|
|
/* Don't use an allocated timer, or a deleted one that's pending */
|
|
for(i = 0; i< NUM_COMPARATORS; i++) {
|
|
if (!base[i].timer && !base[i].tasklet.state) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (i == NUM_COMPARATORS) {
|
|
preempt_enable();
|
|
return -EBUSY;
|
|
}
|
|
|
|
spin_lock_irqsave(&base[i].lock, irqflags);
|
|
|
|
if (base[i].timer || base[i].tasklet.state != 0) {
|
|
spin_unlock_irqrestore(&base[i].lock, irqflags);
|
|
goto retry;
|
|
}
|
|
base[i].timer = timr;
|
|
base[i].cpu = smp_processor_id();
|
|
|
|
timr->it.mmtimer.clock = i;
|
|
timr->it.mmtimer.node = nodeid;
|
|
timr->it.mmtimer.incr = period;
|
|
timr->it.mmtimer.expires = when;
|
|
|
|
if (period == 0) {
|
|
if (!mmtimer_setup(i, when)) {
|
|
mmtimer_disable_int(-1, i);
|
|
posix_timer_event(timr, 0);
|
|
timr->it.mmtimer.expires = 0;
|
|
}
|
|
} else {
|
|
timr->it.mmtimer.expires -= period;
|
|
if (reschedule_periodic_timer(base+i))
|
|
err = -EINVAL;
|
|
}
|
|
|
|
spin_unlock_irqrestore(&base[i].lock, irqflags);
|
|
|
|
preempt_enable();
|
|
|
|
return err;
|
|
}
|
|
|
|
static struct k_clock sgi_clock = {
|
|
.res = 0,
|
|
.clock_set = sgi_clock_set,
|
|
.clock_get = sgi_clock_get,
|
|
.timer_create = sgi_timer_create,
|
|
.nsleep = do_posix_clock_nonanosleep,
|
|
.timer_set = sgi_timer_set,
|
|
.timer_del = sgi_timer_del,
|
|
.timer_get = sgi_timer_get
|
|
};
|
|
|
|
/**
|
|
* mmtimer_init - device initialization routine
|
|
*
|
|
* Does initial setup for the mmtimer device.
|
|
*/
|
|
static int __init mmtimer_init(void)
|
|
{
|
|
unsigned i;
|
|
|
|
if (!ia64_platform_is("sn2"))
|
|
return -1;
|
|
|
|
/*
|
|
* Sanity check the cycles/sec variable
|
|
*/
|
|
if (sn_rtc_cycles_per_second < 100000) {
|
|
printk(KERN_ERR "%s: unable to determine clock frequency\n",
|
|
MMTIMER_NAME);
|
|
return -1;
|
|
}
|
|
|
|
mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
|
|
2) / sn_rtc_cycles_per_second;
|
|
|
|
for (i=0; i< NUM_COMPARATORS*MAX_COMPACT_NODES; i++) {
|
|
spin_lock_init(&timers[i].lock);
|
|
timers[i].timer = NULL;
|
|
timers[i].cpu = 0;
|
|
timers[i].i = i % NUM_COMPARATORS;
|
|
tasklet_init(&timers[i].tasklet, mmtimer_tasklet, (unsigned long) (timers+i));
|
|
}
|
|
|
|
if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) {
|
|
printk(KERN_WARNING "%s: unable to allocate interrupt.",
|
|
MMTIMER_NAME);
|
|
return -1;
|
|
}
|
|
|
|
strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME);
|
|
if (misc_register(&mmtimer_miscdev)) {
|
|
printk(KERN_ERR "%s: failed to register device\n",
|
|
MMTIMER_NAME);
|
|
return -1;
|
|
}
|
|
|
|
sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
|
|
register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);
|
|
|
|
printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
|
|
sn_rtc_cycles_per_second/(unsigned long)1E6);
|
|
|
|
return 0;
|
|
}
|
|
|
|
module_init(mmtimer_init);
|
|
|