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* commit 'v3.6-rc5': (1098 commits) Linux 3.6-rc5 HID: tpkbd: work even if the new Lenovo Keyboard driver is not configured Remove user-triggerable BUG from mpol_to_str xen/pciback: Fix proper FLR steps. uml: fix compile error in deliver_alarm() dj: memory scribble in logi_dj Fix order of arguments to compat_put_time[spec|val] xen: Use correct masking in xen_swiotlb_alloc_coherent. xen: fix logical error in tlb flushing xen/p2m: Fix one-off error in checking the P2M tree directory. powerpc: Don't use __put_user() in patch_instruction powerpc: Make sure IPI handlers see data written by IPI senders powerpc: Restore correct DSCR in context switch powerpc: Fix DSCR inheritance in copy_thread() powerpc: Keep thread.dscr and thread.dscr_inherit in sync powerpc: Update DSCR on all CPUs when writing sysfs dscr_default powerpc/powernv: Always go into nap mode when CPU is offline powerpc: Give hypervisor decrementer interrupts their own handler powerpc/vphn: Fix arch_update_cpu_topology() return value ARM: gemini: fix the gemini build ... Conflicts: drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c drivers/rapidio/devices/tsi721.c
446 lines
11 KiB
C
446 lines
11 KiB
C
/*
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* File: portdrv_pci.c
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* Purpose: PCI Express Port Bus Driver
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*
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* Copyright (C) 2004 Intel
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* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/init.h>
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#include <linux/pcieport_if.h>
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#include <linux/aer.h>
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#include <linux/dmi.h>
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#include <linux/pci-aspm.h>
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#include "portdrv.h"
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#include "aer/aerdrv.h"
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/*
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* Version Information
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*/
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#define DRIVER_VERSION "v1.0"
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#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
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#define DRIVER_DESC "PCIe Port Bus Driver"
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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/* If this switch is set, PCIe port native services should not be enabled. */
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bool pcie_ports_disabled;
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/*
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* If this switch is set, ACPI _OSC will be used to determine whether or not to
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* enable PCIe port native services.
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*/
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bool pcie_ports_auto = true;
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static int __init pcie_port_setup(char *str)
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{
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if (!strncmp(str, "compat", 6)) {
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pcie_ports_disabled = true;
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} else if (!strncmp(str, "native", 6)) {
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pcie_ports_disabled = false;
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pcie_ports_auto = false;
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} else if (!strncmp(str, "auto", 4)) {
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pcie_ports_disabled = false;
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pcie_ports_auto = true;
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}
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return 1;
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}
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__setup("pcie_ports=", pcie_port_setup);
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/* global data */
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/**
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* pcie_clear_root_pme_status - Clear root port PME interrupt status.
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* @dev: PCIe root port or event collector.
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*/
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void pcie_clear_root_pme_status(struct pci_dev *dev)
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{
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pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
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}
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static int pcie_portdrv_restore_config(struct pci_dev *dev)
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{
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int retval;
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retval = pci_enable_device(dev);
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if (retval)
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return retval;
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pci_set_master(dev);
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return 0;
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}
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#ifdef CONFIG_PM
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static int pcie_port_resume_noirq(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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/*
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* Some BIOSes forget to clear Root PME Status bits after system wakeup
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* which breaks ACPI-based runtime wakeup on PCI Express, so clear those
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* bits now just in case (shouldn't hurt).
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*/
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
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pcie_clear_root_pme_status(pdev);
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return 0;
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}
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#ifdef CONFIG_PM_RUNTIME
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struct d3cold_info {
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bool no_d3cold;
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unsigned int d3cold_delay;
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};
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static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
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{
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struct d3cold_info *info = data;
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info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
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info->d3cold_delay);
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if (pdev->no_d3cold)
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info->no_d3cold = true;
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return 0;
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}
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static int pcie_port_runtime_suspend(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct d3cold_info d3cold_info = {
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.no_d3cold = false,
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.d3cold_delay = PCI_PM_D3_WAIT,
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};
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/*
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* If any subordinate device disable D3cold, we should not put
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* the port into D3cold. The D3cold delay of port should be
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* the max of that of all subordinate devices.
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*/
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pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
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pdev->no_d3cold = d3cold_info.no_d3cold;
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pdev->d3cold_delay = d3cold_info.d3cold_delay;
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return 0;
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}
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static int pcie_port_runtime_resume(struct device *dev)
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{
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return 0;
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}
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static int pcie_port_runtime_idle(struct device *dev)
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{
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/* Delay for a short while to prevent too frequent suspend/resume */
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pm_schedule_suspend(dev, 10);
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return -EBUSY;
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}
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#else
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#define pcie_port_runtime_suspend NULL
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#define pcie_port_runtime_resume NULL
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#define pcie_port_runtime_idle NULL
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#endif
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static const struct dev_pm_ops pcie_portdrv_pm_ops = {
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.suspend = pcie_port_device_suspend,
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.resume = pcie_port_device_resume,
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.freeze = pcie_port_device_suspend,
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.thaw = pcie_port_device_resume,
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.poweroff = pcie_port_device_suspend,
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.restore = pcie_port_device_resume,
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.resume_noirq = pcie_port_resume_noirq,
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.runtime_suspend = pcie_port_runtime_suspend,
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.runtime_resume = pcie_port_runtime_resume,
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.runtime_idle = pcie_port_runtime_idle,
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};
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#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
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#else /* !PM */
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#define PCIE_PORTDRV_PM_OPS NULL
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#endif /* !PM */
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/*
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* PCIe port runtime suspend is broken for some chipsets, so use a
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* black list to disable runtime PM for these chipsets.
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*/
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static const struct pci_device_id port_runtime_pm_black_list[] = {
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{ /* end: all zeroes */ }
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};
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/*
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* pcie_portdrv_probe - Probe PCI-Express port devices
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* @dev: PCI-Express port device being probed
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*
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* If detected invokes the pcie_port_device_register() method for
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* this port device.
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*
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*/
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static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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int status;
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if (!pci_is_pcie(dev) ||
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((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
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(pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
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(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
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return -ENODEV;
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if (!dev->irq && dev->pin) {
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dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
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"check vendor BIOS\n", dev->vendor, dev->device);
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}
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status = pcie_port_device_register(dev);
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if (status)
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return status;
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pci_save_state(dev);
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/*
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* D3cold may not work properly on some PCIe port, so disable
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* it by default.
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*/
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dev->d3cold_allowed = false;
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if (!pci_match_id(port_runtime_pm_black_list, dev))
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pm_runtime_put_noidle(&dev->dev);
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return 0;
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}
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static void pcie_portdrv_remove(struct pci_dev *dev)
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{
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if (!pci_match_id(port_runtime_pm_black_list, dev))
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pm_runtime_get_noresume(&dev->dev);
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pcie_port_device_remove(dev);
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pci_disable_device(dev);
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}
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static int error_detected_iter(struct device *device, void *data)
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{
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struct pcie_device *pcie_device;
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struct pcie_port_service_driver *driver;
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struct aer_broadcast_data *result_data;
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pci_ers_result_t status;
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result_data = (struct aer_broadcast_data *) data;
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if (device->bus == &pcie_port_bus_type && device->driver) {
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driver = to_service_driver(device->driver);
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if (!driver ||
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!driver->err_handler ||
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!driver->err_handler->error_detected)
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return 0;
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pcie_device = to_pcie_device(device);
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/* Forward error detected message to service drivers */
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status = driver->err_handler->error_detected(
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pcie_device->port,
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result_data->state);
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result_data->result =
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merge_result(result_data->result, status);
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}
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return 0;
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}
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static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
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enum pci_channel_state error)
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{
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struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
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int ret;
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/* can not fail */
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ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
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return data.result;
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}
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static int mmio_enabled_iter(struct device *device, void *data)
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{
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struct pcie_device *pcie_device;
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struct pcie_port_service_driver *driver;
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pci_ers_result_t status, *result;
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result = (pci_ers_result_t *) data;
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if (device->bus == &pcie_port_bus_type && device->driver) {
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driver = to_service_driver(device->driver);
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if (driver &&
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driver->err_handler &&
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driver->err_handler->mmio_enabled) {
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pcie_device = to_pcie_device(device);
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/* Forward error message to service drivers */
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status = driver->err_handler->mmio_enabled(
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pcie_device->port);
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*result = merge_result(*result, status);
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}
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}
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return 0;
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}
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static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
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{
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pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
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int retval;
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/* get true return value from &status */
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retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
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return status;
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}
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static int slot_reset_iter(struct device *device, void *data)
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{
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struct pcie_device *pcie_device;
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struct pcie_port_service_driver *driver;
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pci_ers_result_t status, *result;
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result = (pci_ers_result_t *) data;
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if (device->bus == &pcie_port_bus_type && device->driver) {
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driver = to_service_driver(device->driver);
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if (driver &&
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driver->err_handler &&
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driver->err_handler->slot_reset) {
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pcie_device = to_pcie_device(device);
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/* Forward error message to service drivers */
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status = driver->err_handler->slot_reset(
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pcie_device->port);
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*result = merge_result(*result, status);
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}
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}
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return 0;
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}
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static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
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{
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pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
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int retval;
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/* If fatal, restore cfg space for possible link reset at upstream */
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if (dev->error_state == pci_channel_io_frozen) {
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dev->state_saved = true;
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pci_restore_state(dev);
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pcie_portdrv_restore_config(dev);
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pci_enable_pcie_error_reporting(dev);
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}
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/* get true return value from &status */
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retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);
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return status;
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}
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static int resume_iter(struct device *device, void *data)
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{
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struct pcie_device *pcie_device;
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struct pcie_port_service_driver *driver;
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if (device->bus == &pcie_port_bus_type && device->driver) {
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driver = to_service_driver(device->driver);
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if (driver &&
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driver->err_handler &&
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driver->err_handler->resume) {
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pcie_device = to_pcie_device(device);
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/* Forward error message to service drivers */
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driver->err_handler->resume(pcie_device->port);
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}
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}
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return 0;
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}
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static void pcie_portdrv_err_resume(struct pci_dev *dev)
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{
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int retval;
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/* nothing to do with error value, if it ever happens */
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retval = device_for_each_child(&dev->dev, NULL, resume_iter);
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}
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/*
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* LINUX Device Driver Model
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*/
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static const struct pci_device_id port_pci_ids[] = { {
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/* handle any PCI-Express port */
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PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
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}, { /* end: all zeroes */ }
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};
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MODULE_DEVICE_TABLE(pci, port_pci_ids);
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static const struct pci_error_handlers pcie_portdrv_err_handler = {
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.error_detected = pcie_portdrv_error_detected,
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.mmio_enabled = pcie_portdrv_mmio_enabled,
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.slot_reset = pcie_portdrv_slot_reset,
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.resume = pcie_portdrv_err_resume,
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};
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static struct pci_driver pcie_portdriver = {
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.name = "pcieport",
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.id_table = &port_pci_ids[0],
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.probe = pcie_portdrv_probe,
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.remove = pcie_portdrv_remove,
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.err_handler = &pcie_portdrv_err_handler,
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.driver.pm = PCIE_PORTDRV_PM_OPS,
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};
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static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
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{
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pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
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d->ident);
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pcie_pme_disable_msi();
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return 0;
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}
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static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
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/*
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* Boxes that should not use MSI for PCIe PME signaling.
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*/
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{
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.callback = dmi_pcie_pme_disable_msi,
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.ident = "MSI Wind U-100",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR,
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"MICRO-STAR INTERNATIONAL CO., LTD"),
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DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
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},
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},
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{}
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};
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static int __init pcie_portdrv_init(void)
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{
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int retval;
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if (pcie_ports_disabled)
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return pci_register_driver(&pcie_portdriver);
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dmi_check_system(pcie_portdrv_dmi_table);
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retval = pcie_port_bus_register();
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if (retval) {
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printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
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goto out;
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}
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retval = pci_register_driver(&pcie_portdriver);
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if (retval)
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pcie_port_bus_unregister();
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out:
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return retval;
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}
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module_init(pcie_portdrv_init);
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