![Catalin Marinas](/assets/img/avatar_default.png)
Since mandatory barriers may be used (explicitly or implicitly via readl etc.) to ensure the ordering between Device and Normal memory accesses, a DMB is not enough. This patch converts it to a DSB. Cc: Colin Cross <ccross@android.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
9 lines
248 B
C
9 lines
248 B
C
/*
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* Barriers redefined for RealView ARM11MPCore platforms with L220 cache
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* controller to work around hardware errata causing the outer_sync()
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* operation to deadlock the system.
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*/
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#define mb() dsb()
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#define rmb() dsb()
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#define wmb() mb()
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