b299167652
This allows using OpenCores I2C controller attached to its host in native-endian mode with bi-endian CPUs. Example of such system is Xtensa XTFPGA platform. Acked-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
24 lines
757 B
C
24 lines
757 B
C
/*
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* i2c-ocores.h - definitions for the i2c-ocores interface
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*
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* Peter Korsgaard <jacmet@sunsite.dk>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef _LINUX_I2C_OCORES_H
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#define _LINUX_I2C_OCORES_H
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struct ocores_i2c_platform_data {
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u32 reg_shift; /* register offset shift value */
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u32 reg_io_width; /* register io read/write width */
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u32 clock_khz; /* input clock in kHz */
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bool big_endian; /* registers are big endian */
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u8 num_devices; /* number of devices in the devices list */
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struct i2c_board_info const *devices; /* devices connected to the bus */
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};
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#endif /* _LINUX_I2C_OCORES_H */
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