![Joseph Lo](/assets/img/avatar_default.png)
This supports CPU core power down on each CPU when CPU idle. When CPU go into this state, it saves it's context and needs a proper configuration in flow controller to power gate the CPU when CPU runs into WFI instruction. And the CPU also needs to set the IRQ as CPU power down idle wake up event in flow controller. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
85 lines
2 KiB
C
85 lines
2 KiB
C
/*
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* Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/cpuidle.h>
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#include <linux/cpu_pm.h>
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#include <linux/clockchips.h>
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#include <asm/cpuidle.h>
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#include <asm/suspend.h>
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#include <asm/smp_plat.h>
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#include "pm.h"
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#include "sleep.h"
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#ifdef CONFIG_PM_SLEEP
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#define TEGRA114_MAX_STATES 2
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#else
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#define TEGRA114_MAX_STATES 1
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#endif
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#ifdef CONFIG_PM_SLEEP
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static int tegra114_idle_power_down(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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local_fiq_disable();
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tegra_set_cpu_in_lp2();
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cpu_pm_enter();
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
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cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2();
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local_fiq_enable();
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return index;
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}
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#endif
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static struct cpuidle_driver tegra_idle_driver = {
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.name = "tegra_idle",
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.owner = THIS_MODULE,
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.state_count = TEGRA114_MAX_STATES,
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.states = {
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[0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
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#ifdef CONFIG_PM_SLEEP
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[1] = {
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.enter = tegra114_idle_power_down,
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.exit_latency = 500,
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.target_residency = 1000,
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.power_usage = 0,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.name = "powered-down",
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.desc = "CPU power gated",
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},
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#endif
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},
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};
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int __init tegra114_cpuidle_init(void)
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{
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return cpuidle_register(&tegra_idle_driver, NULL);
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}
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