25 lines
842 B
Plaintext
25 lines
842 B
Plaintext
Qualcomm Graphics Clock & Reset Controller Binding
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--------------------------------------------------
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Required properties :
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- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc"
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- reg : shall contain base register location and length
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- #clock-cells : from common clock binding, shall contain 1
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- #reset-cells : from common reset binding, shall contain 1
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- #power-domain-cells : from generic power domain binding, shall contain 1
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- clocks : shall contain the XO clock
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shall contain the gpll0 out main clock (msm8998)
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- clock-names : shall be "xo"
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shall be "gpll0" (msm8998)
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Example:
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gpucc: clock-controller@5090000 {
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compatible = "qcom,sdm845-gpucc";
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reg = <0x5090000 0x9000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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};
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