![Pierre-Louis Bossart](/assets/img/avatar_default.png)
Remove the ambiguity with GPL-2.0 and use an explicit GPL-2.0-only tag. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Link: https://lore.kernel.org/r/20200501145850.15178-1-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
83 lines
2.6 KiB
C
83 lines
2.6 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*/
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#ifndef __INCLUDE_SOUND_SOF_DAI_H__
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#define __INCLUDE_SOUND_SOF_DAI_H__
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#include <sound/sof/header.h>
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#include <sound/sof/dai-intel.h>
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#include <sound/sof/dai-imx.h>
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/*
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* DAI Configuration.
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*
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* Each different DAI type will have it's own structure and IPC cmd.
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*/
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#define SOF_DAI_FMT_I2S 1 /**< I2S mode */
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#define SOF_DAI_FMT_RIGHT_J 2 /**< Right Justified mode */
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#define SOF_DAI_FMT_LEFT_J 3 /**< Left Justified mode */
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#define SOF_DAI_FMT_DSP_A 4 /**< L data MSB after FRM LRC */
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#define SOF_DAI_FMT_DSP_B 5 /**< L data MSB during FRM LRC */
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#define SOF_DAI_FMT_PDM 6 /**< Pulse density modulation */
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#define SOF_DAI_FMT_CONT (1 << 4) /**< continuous clock */
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#define SOF_DAI_FMT_GATED (0 << 4) /**< clock is gated */
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#define SOF_DAI_FMT_NB_NF (0 << 8) /**< normal bit clock + frame */
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#define SOF_DAI_FMT_NB_IF (2 << 8) /**< normal BCLK + inv FRM */
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#define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */
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#define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */
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#define SOF_DAI_FMT_CBM_CFM (0 << 12) /**< codec clk & FRM master */
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#define SOF_DAI_FMT_CBS_CFM (2 << 12) /**< codec clk slave & FRM master */
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#define SOF_DAI_FMT_CBM_CFS (3 << 12) /**< codec clk master & frame slave */
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#define SOF_DAI_FMT_CBS_CFS (4 << 12) /**< codec clk & FRM slave */
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#define SOF_DAI_FMT_FORMAT_MASK 0x000f
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#define SOF_DAI_FMT_CLOCK_MASK 0x00f0
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#define SOF_DAI_FMT_INV_MASK 0x0f00
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#define SOF_DAI_FMT_MASTER_MASK 0xf000
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/** \brief Types of DAI */
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enum sof_ipc_dai_type {
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SOF_DAI_INTEL_NONE = 0, /**< None */
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SOF_DAI_INTEL_SSP, /**< Intel SSP */
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SOF_DAI_INTEL_DMIC, /**< Intel DMIC */
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SOF_DAI_INTEL_HDA, /**< Intel HD/A */
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SOF_DAI_INTEL_ALH, /**< Intel ALH */
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SOF_DAI_IMX_SAI, /**< i.MX SAI */
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SOF_DAI_IMX_ESAI, /**< i.MX ESAI */
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};
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/* general purpose DAI configuration */
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struct sof_ipc_dai_config {
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struct sof_ipc_cmd_hdr hdr;
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uint32_t type; /**< DAI type - enum sof_ipc_dai_type */
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uint32_t dai_index; /**< index of this type dai */
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/* physical protocol and clocking */
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uint16_t format; /**< SOF_DAI_FMT_ */
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uint16_t reserved16; /**< alignment */
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/* reserved for future use */
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uint32_t reserved[8];
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/* HW specific data */
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union {
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struct sof_ipc_dai_ssp_params ssp;
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struct sof_ipc_dai_dmic_params dmic;
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struct sof_ipc_dai_hda_params hda;
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struct sof_ipc_dai_alh_params alh;
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struct sof_ipc_dai_esai_params esai;
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struct sof_ipc_dai_sai_params sai;
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};
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} __packed;
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#endif
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