169 lines
3.2 KiB
Plaintext
169 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2017 Amlogic, Inc. All rights reserved.
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*/
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/dts-v1/;
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#include "meson-axg.dtsi"
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/ {
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compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
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model = "Amlogic Meson AXG S400 Development Board";
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aliases {
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serial0 = &uart_AO;
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serial1 = &uart_A;
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};
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vddio_boot: regulator-vddio_boot {
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compatible = "regulator-fixed";
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regulator-name = "VDDIO_BOOT";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vddao_3v3: regulator-vddao_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VDDAO_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vddio_ao18: regulator-vddio_ao18 {
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compatible = "regulator-fixed";
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regulator-name = "VDDIO_AO18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: regulator-vcc_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
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clocks = <&wifi32k>;
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clock-names = "ext_clock";
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};
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wifi32k: wifi32k {
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compatible = "pwm-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
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};
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};
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ðmac {
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status = "okay";
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pinctrl-0 = <ð_rgmii_y_pins>;
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pinctrl-names = "default";
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phy-handle = <ð_phy0>;
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phy-mode = "rgmii";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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eth_phy0: ethernet-phy@0 {
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/* Realtek RTL8211F (0x001cc916) */
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reg = <0>;
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eee-broken-1000t;
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};
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};
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};
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&uart_A {
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status = "okay";
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pinctrl-0 = <&uart_a_pins>;
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pinctrl-names = "default";
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};
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&uart_AO {
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status = "okay";
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pinctrl-0 = <&uart_ao_a_pins>;
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pinctrl-names = "default";
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};
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&ir {
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status = "okay";
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pinctrl-0 = <&remote_input_ao_pins>;
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pinctrl-names = "default";
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};
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&i2c1 {
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status = "okay";
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pinctrl-0 = <&i2c1_z_pins>;
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pinctrl-names = "default";
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};
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&i2c_AO {
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status = "okay";
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pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
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pinctrl-names = "default";
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};
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&pwm_ab {
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status = "okay";
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pinctrl-0 = <&pwm_a_x20_pins>;
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pinctrl-names = "default";
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};
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/* emmc storage */
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&sd_emmc_c {
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status = "okay";
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pinctrl-0 = <&emmc_pins>;
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pinctrl-1 = <&emmc_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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bus-width = <8>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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max-frequency = <180000000>;
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non-removable;
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disable-wp;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&vddio_boot>;
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};
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/* wifi module */
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&sd_emmc_b {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&sdio_pins>;
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pinctrl-1 = <&sdio_clk_gate_pins>;
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pinctrl-names = "default", "clk-gate";
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bus-width = <4>;
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cap-sd-highspeed;
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max-frequency = <100000000>;
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non-removable;
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disable-wp;
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mmc-pwrseq = <&sdio_pwrseq>;
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vmmc-supply = <&vddao_3v3>;
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vqmmc-supply = <&vddio_boot>;
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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};
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};
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