9e368f2915
This adds support for running KVM guests in supervisor mode on those PPC970 processors that have a usable hypervisor mode. Unfortunately, Apple G5 machines have supervisor mode disabled (MSR[HV] is forced to 1), but the YDL PowerStation does have a usable hypervisor mode. There are several differences between the PPC970 and POWER7 in how guests are managed. These differences are accommodated using the CPU_FTR_ARCH_201 (PPC970) and CPU_FTR_ARCH_206 (POWER7) CPU feature bits. Notably, on PPC970: * The LPCR, LPID or RMOR registers don't exist, and the functions of those registers are provided by bits in HID4 and one bit in HID0. * External interrupts can be directed to the hypervisor, but unlike POWER7 they are masked by MSR[EE] in non-hypervisor modes and use SRR0/1 not HSRR0/1. * There is no virtual RMA (VRMA) mode; the guest must use an RMO (real mode offset) area. * The TLB entries are not tagged with the LPID, so it is necessary to flush the whole TLB on partition switch. Furthermore, when switching partitions we have to ensure that no other CPU is executing the tlbie or tlbsync instructions in either the old or the new partition, otherwise undefined behaviour can occur. * The PMU has 8 counters (PMC registers) rather than 6. * The DSCR, PURR, SPURR, AMR, AMOR, UAMOR registers don't exist. * The SLB has 64 entries rather than 32. * There is no mediated external interrupt facility, so if we switch to a guest that has a virtual external interrupt pending but the guest has MSR[EE] = 0, we have to arrange to have an interrupt pending for it so that we can get control back once it re-enables interrupts. We do that by sending ourselves an IPI with smp_send_reschedule after hard-disabling interrupts. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
181 lines
4.7 KiB
C
181 lines
4.7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/hugetlb.h>
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#include <asm/tlbflush.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu-hash64.h>
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#include <asm/hvcall.h>
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#include <asm/synch.h>
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#include <asm/ppc-opcode.h>
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#include <asm/cputable.h>
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/* For now use fixed-size 16MB page table */
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#define HPT_ORDER 24
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#define HPT_NPTEG (1ul << (HPT_ORDER - 7)) /* 128B per pteg */
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#define HPT_HASH_MASK (HPT_NPTEG - 1)
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/* Pages in the VRMA are 16MB pages */
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#define VRMA_PAGE_ORDER 24
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#define VRMA_VSID 0x1ffffffUL /* 1TB VSID reserved for VRMA */
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/* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */
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#define MAX_LPID_970 63
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#define NR_LPIDS (LPID_RSVD + 1)
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unsigned long lpid_inuse[BITS_TO_LONGS(NR_LPIDS)];
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long kvmppc_alloc_hpt(struct kvm *kvm)
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{
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unsigned long hpt;
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unsigned long lpid;
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hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|__GFP_NOWARN,
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HPT_ORDER - PAGE_SHIFT);
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if (!hpt) {
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pr_err("kvm_alloc_hpt: Couldn't alloc HPT\n");
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return -ENOMEM;
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}
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kvm->arch.hpt_virt = hpt;
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do {
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lpid = find_first_zero_bit(lpid_inuse, NR_LPIDS);
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if (lpid >= NR_LPIDS) {
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pr_err("kvm_alloc_hpt: No LPIDs free\n");
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free_pages(hpt, HPT_ORDER - PAGE_SHIFT);
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return -ENOMEM;
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}
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} while (test_and_set_bit(lpid, lpid_inuse));
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kvm->arch.sdr1 = __pa(hpt) | (HPT_ORDER - 18);
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kvm->arch.lpid = lpid;
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pr_info("KVM guest htab at %lx, LPID %lx\n", hpt, lpid);
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return 0;
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}
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void kvmppc_free_hpt(struct kvm *kvm)
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{
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clear_bit(kvm->arch.lpid, lpid_inuse);
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free_pages(kvm->arch.hpt_virt, HPT_ORDER - PAGE_SHIFT);
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}
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void kvmppc_map_vrma(struct kvm *kvm, struct kvm_userspace_memory_region *mem)
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{
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unsigned long i;
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unsigned long npages = kvm->arch.ram_npages;
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unsigned long pfn;
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unsigned long *hpte;
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unsigned long hash;
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struct kvmppc_pginfo *pginfo = kvm->arch.ram_pginfo;
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if (!pginfo)
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return;
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/* VRMA can't be > 1TB */
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if (npages > 1ul << (40 - kvm->arch.ram_porder))
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npages = 1ul << (40 - kvm->arch.ram_porder);
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/* Can't use more than 1 HPTE per HPTEG */
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if (npages > HPT_NPTEG)
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npages = HPT_NPTEG;
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for (i = 0; i < npages; ++i) {
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pfn = pginfo[i].pfn;
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if (!pfn)
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break;
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/* can't use hpt_hash since va > 64 bits */
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hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & HPT_HASH_MASK;
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/*
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* We assume that the hash table is empty and no
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* vcpus are using it at this stage. Since we create
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* at most one HPTE per HPTEG, we just assume entry 7
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* is available and use it.
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*/
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hpte = (unsigned long *) (kvm->arch.hpt_virt + (hash << 7));
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hpte += 7 * 2;
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/* HPTE low word - RPN, protection, etc. */
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hpte[1] = (pfn << PAGE_SHIFT) | HPTE_R_R | HPTE_R_C |
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HPTE_R_M | PP_RWXX;
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wmb();
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hpte[0] = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) |
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(i << (VRMA_PAGE_ORDER - 16)) | HPTE_V_BOLTED |
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HPTE_V_LARGE | HPTE_V_VALID;
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}
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}
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int kvmppc_mmu_hv_init(void)
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{
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unsigned long host_lpid, rsvd_lpid;
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if (!cpu_has_feature(CPU_FTR_HVMODE))
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return -EINVAL;
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memset(lpid_inuse, 0, sizeof(lpid_inuse));
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if (cpu_has_feature(CPU_FTR_ARCH_206)) {
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host_lpid = mfspr(SPRN_LPID); /* POWER7 */
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rsvd_lpid = LPID_RSVD;
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} else {
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host_lpid = 0; /* PPC970 */
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rsvd_lpid = MAX_LPID_970;
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}
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set_bit(host_lpid, lpid_inuse);
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/* rsvd_lpid is reserved for use in partition switching */
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set_bit(rsvd_lpid, lpid_inuse);
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return 0;
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}
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void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
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{
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}
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static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
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{
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kvmppc_set_msr(vcpu, MSR_SF | MSR_ME);
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}
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static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *gpte, bool data)
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{
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return -ENOENT;
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}
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void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
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if (cpu_has_feature(CPU_FTR_ARCH_206))
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vcpu->arch.slb_nr = 32; /* POWER7 */
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else
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vcpu->arch.slb_nr = 64;
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mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate;
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mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr;
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vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
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}
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