Aneesh Kumar K.V c6d1a767b9 powerpc/mm/radix: Use different pte update sequence for different POWER9 revs ... POWER9 DD1 requires pte to be marked invalid (V=0) before updating it with the new value. This makes this distinction for the different revisions. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2016-09-13 17:37:10 +10:00
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hash.h	powerpc/mm: Drop PTE_ATOMIC_UPDATES from pmd_hugepage_update()	2016-05-01 18:32:15 +10:00
mmu-hash.h	powerpc/mm: Move radix/hash common data structures to book3s64 headers	2016-05-01 18:32:37 +10:00
pgalloc.h	powerpc/mm/radix: Flush page walk cache when freeing page table	2016-06-10 16:14:52 +10:00
pgtable.h	powerpc/mm/radix: Use different pte update sequence for different POWER9 revs	2016-09-13 17:37:10 +10:00