![Laurent Pinchart](/assets/img/avatar_default.png)
The top-level error handler calls drm_mode_config_cleanup() which will destroy all planes. There's no need to destroy them manually in lower error handlers. As plane cleanup is now handled entirely by drm_mode_config_cleanup(), we must ensure that the plane .destroy() handler frees allocated memory for the plane object that was freed by malidp_de_planes_destroy(). Do so by replacing the call to devm_kfree() in the .destroy() handler by kfree(). devm_kfree() is currently a no-op as the plane memory is allocated with kzalloc(), not devm_kzalloc(). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
/*
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* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
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* Author: Liviu Dudau <Liviu.Dudau@arm.com>
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
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*/
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#ifndef __MALIDP_DRV_H__
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#define __MALIDP_DRV_H__
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#include <linux/mutex.h>
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#include <linux/wait.h>
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#include <drm/drmP.h>
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#include "malidp_hw.h"
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struct malidp_drm {
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struct malidp_hw_device *dev;
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struct drm_crtc crtc;
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wait_queue_head_t wq;
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struct drm_pending_vblank_event *event;
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atomic_t config_valid;
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u32 core_id;
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};
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#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
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struct malidp_plane {
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struct drm_plane base;
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struct malidp_hw_device *hwdev;
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const struct malidp_layer *layer;
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};
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struct malidp_plane_state {
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struct drm_plane_state base;
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/* size of the required rotation memory if plane is rotated */
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u32 rotmem_size;
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/* internal format ID */
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u8 format;
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u8 n_planes;
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};
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#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
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#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
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struct malidp_crtc_state {
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struct drm_crtc_state base;
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u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
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u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
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struct malidp_se_config scaler_config;
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/* Bitfield of all the planes that have requested a scaled output. */
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u8 scaled_planes_mask;
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};
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#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
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int malidp_de_planes_init(struct drm_device *drm);
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int malidp_crtc_init(struct drm_device *drm);
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/* often used combination of rotational bits */
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#define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
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#endif /* __MALIDP_DRV_H__ */
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