![Shashank Sharma](/assets/img/avatar_default.png)
HDMI 1.4b support the CEA video modes as per range of CEA-861-D (VIC 1-64). For any other mode, the VIC filed in AVI infoframes should be 0. HDMI 2.0 sinks, support video modes range as per CEA-861-F spec, which is extended to (VIC 1-107). This patch adds a bool input variable, which indicates if the connected sink is a HDMI 2.0 sink or not. This will make sure that we don't pass a HDMI 2.0 VIC to a HDMI 1.4 sink. This patch touches all drm drivers, who are callers of this function drm_hdmi_avi_infoframe_from_display_mode but to make sure there is no change in current behavior, is_hdmi2 is kept as false. In case of I915 driver, this patch: - checks if the connected display is HDMI 2.0. - HDMI infoframes carry one of this two type of information: - VIC for 4K modes for HDMI 1.4 sinks - S3D information for S3D modes As CEA-861-F has already defined VICs for 4K videomodes, this patch doesn't allow sending HDMI infoframes for HDMI 2.0 sinks, until the mode is 3D. Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Jose Abreu <jose.abreu@synopsys.com> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Daniel Vetter <daniel.vetter@intel.com> PS: This patch touches a few lines in few files, which were already above 80 char, so checkpatch gives 80 char warning again. - gpu/drm/omapdrm/omap_encoder.c - gpu/drm/i915/intel_sdvo.c V2: Rebase, Added r-b from Andrzej V3: Addressed review comment from Ville: - Do not send VICs in both AVI-IF and HDMI-IF send only one of it. V4: Rebase V5: Added r-b from Neil. Addressed review comments from Ville - Do not block HDMI vendor IF, instead check for VIC while handling AVI infoframes V6: Rebase V7: Rebase Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-2-git-send-email-shashank.sharma@intel.com Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
790 lines
26 KiB
C
790 lines
26 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Slava Grigorev <slava.grigorev@amd.com>
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*/
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#include <linux/gcd.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc.h>
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#include "radeon.h"
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#include "atom.h"
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#include "radeon_audio.h"
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void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
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u8 enable_mask);
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void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
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u8 enable_mask);
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void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
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u8 enable_mask);
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u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
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void dce6_endpoint_wreg(struct radeon_device *rdev,
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u32 offset, u32 reg, u32 v);
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void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
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struct cea_sad *sads, int sad_count);
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void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
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struct cea_sad *sads, int sad_count);
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void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
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struct cea_sad *sads, int sad_count);
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void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
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u8 *sadb, int sad_count);
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void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
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u8 *sadb, int sad_count);
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void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
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u8 *sadb, int sad_count);
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void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
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u8 *sadb, int sad_count);
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void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
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u8 *sadb, int sad_count);
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void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
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u8 *sadb, int sad_count);
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void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
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struct drm_connector *connector, struct drm_display_mode *mode);
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void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
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struct drm_connector *connector, struct drm_display_mode *mode);
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struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
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struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
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void dce6_afmt_select_pin(struct drm_encoder *encoder);
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void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
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struct radeon_crtc *crtc, unsigned int clock);
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void dce3_2_audio_set_dto(struct radeon_device *rdev,
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struct radeon_crtc *crtc, unsigned int clock);
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void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
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struct radeon_crtc *crtc, unsigned int clock);
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void dce4_dp_audio_set_dto(struct radeon_device *rdev,
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struct radeon_crtc *crtc, unsigned int clock);
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void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
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struct radeon_crtc *crtc, unsigned int clock);
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void dce6_dp_audio_set_dto(struct radeon_device *rdev,
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struct radeon_crtc *crtc, unsigned int clock);
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void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
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unsigned char *buffer, size_t size);
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void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
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unsigned char *buffer, size_t size);
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void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
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const struct radeon_hdmi_acr *acr);
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void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
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const struct radeon_hdmi_acr *acr);
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void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
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const struct radeon_hdmi_acr *acr);
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void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
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void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
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void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
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u32 offset, int bpc);
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void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
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void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
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void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
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void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
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void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
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void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
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static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode);
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static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode);
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void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
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void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
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void evergreen_dp_enable(struct drm_encoder *encoder, bool enable);
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static const u32 pin_offsets[7] =
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{
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(0x5e00 - 0x5e00),
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(0x5e18 - 0x5e00),
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(0x5e30 - 0x5e00),
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(0x5e48 - 0x5e00),
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(0x5e60 - 0x5e00),
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(0x5e78 - 0x5e00),
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(0x5e90 - 0x5e00),
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};
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static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
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{
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return RREG32(reg);
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}
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static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
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u32 reg, u32 v)
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{
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WREG32(reg, v);
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}
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static struct radeon_audio_basic_funcs r600_funcs = {
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.endpoint_rreg = radeon_audio_rreg,
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.endpoint_wreg = radeon_audio_wreg,
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.enable = r600_audio_enable,
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};
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static struct radeon_audio_basic_funcs dce32_funcs = {
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.endpoint_rreg = radeon_audio_rreg,
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.endpoint_wreg = radeon_audio_wreg,
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.enable = r600_audio_enable,
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};
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static struct radeon_audio_basic_funcs dce4_funcs = {
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.endpoint_rreg = radeon_audio_rreg,
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.endpoint_wreg = radeon_audio_wreg,
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.enable = dce4_audio_enable,
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};
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static struct radeon_audio_basic_funcs dce6_funcs = {
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.endpoint_rreg = dce6_endpoint_rreg,
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.endpoint_wreg = dce6_endpoint_wreg,
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.enable = dce6_audio_enable,
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};
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static struct radeon_audio_funcs r600_hdmi_funcs = {
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.get_pin = r600_audio_get_pin,
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.set_dto = r600_hdmi_audio_set_dto,
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.update_acr = r600_hdmi_update_acr,
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.set_vbi_packet = r600_set_vbi_packet,
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.set_avi_packet = r600_set_avi_packet,
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.set_audio_packet = r600_set_audio_packet,
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.set_mute = r600_set_mute,
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.mode_set = radeon_audio_hdmi_mode_set,
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.dpms = r600_hdmi_enable,
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};
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static struct radeon_audio_funcs dce32_hdmi_funcs = {
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.get_pin = r600_audio_get_pin,
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.write_sad_regs = dce3_2_afmt_write_sad_regs,
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.write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
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.set_dto = dce3_2_audio_set_dto,
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.update_acr = dce3_2_hdmi_update_acr,
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.set_vbi_packet = r600_set_vbi_packet,
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.set_avi_packet = r600_set_avi_packet,
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.set_audio_packet = dce3_2_set_audio_packet,
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.set_mute = dce3_2_set_mute,
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.mode_set = radeon_audio_hdmi_mode_set,
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.dpms = r600_hdmi_enable,
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};
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static struct radeon_audio_funcs dce32_dp_funcs = {
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.get_pin = r600_audio_get_pin,
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.write_sad_regs = dce3_2_afmt_write_sad_regs,
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.write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
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.set_dto = dce3_2_audio_set_dto,
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.set_avi_packet = r600_set_avi_packet,
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.set_audio_packet = dce3_2_set_audio_packet,
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};
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static struct radeon_audio_funcs dce4_hdmi_funcs = {
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.get_pin = r600_audio_get_pin,
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.write_sad_regs = evergreen_hdmi_write_sad_regs,
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.write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
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.write_latency_fields = dce4_afmt_write_latency_fields,
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.set_dto = dce4_hdmi_audio_set_dto,
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.update_acr = evergreen_hdmi_update_acr,
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.set_vbi_packet = dce4_set_vbi_packet,
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.set_color_depth = dce4_hdmi_set_color_depth,
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.set_avi_packet = evergreen_set_avi_packet,
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.set_audio_packet = dce4_set_audio_packet,
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.set_mute = dce4_set_mute,
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.mode_set = radeon_audio_hdmi_mode_set,
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.dpms = evergreen_hdmi_enable,
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};
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static struct radeon_audio_funcs dce4_dp_funcs = {
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.get_pin = r600_audio_get_pin,
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.write_sad_regs = evergreen_hdmi_write_sad_regs,
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.write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
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.write_latency_fields = dce4_afmt_write_latency_fields,
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.set_dto = dce4_dp_audio_set_dto,
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.set_avi_packet = evergreen_set_avi_packet,
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.set_audio_packet = dce4_set_audio_packet,
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.mode_set = radeon_audio_dp_mode_set,
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.dpms = evergreen_dp_enable,
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};
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static struct radeon_audio_funcs dce6_hdmi_funcs = {
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.select_pin = dce6_afmt_select_pin,
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.get_pin = dce6_audio_get_pin,
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.write_sad_regs = dce6_afmt_write_sad_regs,
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.write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
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.write_latency_fields = dce6_afmt_write_latency_fields,
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.set_dto = dce6_hdmi_audio_set_dto,
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.update_acr = evergreen_hdmi_update_acr,
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.set_vbi_packet = dce4_set_vbi_packet,
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.set_color_depth = dce4_hdmi_set_color_depth,
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.set_avi_packet = evergreen_set_avi_packet,
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.set_audio_packet = dce4_set_audio_packet,
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.set_mute = dce4_set_mute,
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.mode_set = radeon_audio_hdmi_mode_set,
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.dpms = evergreen_hdmi_enable,
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};
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static struct radeon_audio_funcs dce6_dp_funcs = {
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.select_pin = dce6_afmt_select_pin,
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.get_pin = dce6_audio_get_pin,
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.write_sad_regs = dce6_afmt_write_sad_regs,
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.write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
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.write_latency_fields = dce6_afmt_write_latency_fields,
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.set_dto = dce6_dp_audio_set_dto,
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.set_avi_packet = evergreen_set_avi_packet,
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.set_audio_packet = dce4_set_audio_packet,
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.mode_set = radeon_audio_dp_mode_set,
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.dpms = evergreen_dp_enable,
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};
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static void radeon_audio_enable(struct radeon_device *rdev,
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struct r600_audio_pin *pin, u8 enable_mask)
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{
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struct drm_encoder *encoder;
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struct radeon_encoder *radeon_encoder;
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struct radeon_encoder_atom_dig *dig;
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int pin_count = 0;
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if (!pin)
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return;
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if (rdev->mode_info.mode_config_initialized) {
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list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
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if (radeon_encoder_is_digital(encoder)) {
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radeon_encoder = to_radeon_encoder(encoder);
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dig = radeon_encoder->enc_priv;
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if (dig->pin == pin)
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pin_count++;
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}
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}
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if ((pin_count > 1) && (enable_mask == 0))
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return;
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}
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if (rdev->audio.funcs->enable)
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rdev->audio.funcs->enable(rdev, pin, enable_mask);
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}
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static void radeon_audio_interface_init(struct radeon_device *rdev)
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{
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if (ASIC_IS_DCE6(rdev)) {
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rdev->audio.funcs = &dce6_funcs;
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rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
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rdev->audio.dp_funcs = &dce6_dp_funcs;
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} else if (ASIC_IS_DCE4(rdev)) {
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rdev->audio.funcs = &dce4_funcs;
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rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
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rdev->audio.dp_funcs = &dce4_dp_funcs;
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} else if (ASIC_IS_DCE32(rdev)) {
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rdev->audio.funcs = &dce32_funcs;
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rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
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rdev->audio.dp_funcs = &dce32_dp_funcs;
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} else {
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rdev->audio.funcs = &r600_funcs;
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rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
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rdev->audio.dp_funcs = 0;
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}
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}
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static int radeon_audio_chipset_supported(struct radeon_device *rdev)
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{
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return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
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}
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int radeon_audio_init(struct radeon_device *rdev)
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{
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int i;
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if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
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return 0;
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rdev->audio.enabled = true;
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if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
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rdev->audio.num_pins = 3;
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else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
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rdev->audio.num_pins = 7;
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else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
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rdev->audio.num_pins = 7;
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else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
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rdev->audio.num_pins = 2;
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else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
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rdev->audio.num_pins = 6;
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else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
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rdev->audio.num_pins = 6;
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else
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rdev->audio.num_pins = 1;
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for (i = 0; i < rdev->audio.num_pins; i++) {
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rdev->audio.pin[i].channels = -1;
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rdev->audio.pin[i].rate = -1;
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rdev->audio.pin[i].bits_per_sample = -1;
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rdev->audio.pin[i].status_bits = 0;
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rdev->audio.pin[i].category_code = 0;
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rdev->audio.pin[i].connected = false;
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rdev->audio.pin[i].offset = pin_offsets[i];
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rdev->audio.pin[i].id = i;
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}
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radeon_audio_interface_init(rdev);
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/* disable audio. it will be set up later */
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for (i = 0; i < rdev->audio.num_pins; i++)
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radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
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return 0;
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}
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u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
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{
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if (rdev->audio.funcs->endpoint_rreg)
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return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
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return 0;
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}
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void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
|
|
u32 reg, u32 v)
|
|
{
|
|
if (rdev->audio.funcs->endpoint_wreg)
|
|
rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
|
|
}
|
|
|
|
static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
|
|
{
|
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct cea_sad *sads;
|
|
int sad_count;
|
|
|
|
if (!connector)
|
|
return;
|
|
|
|
sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
|
|
if (sad_count <= 0) {
|
|
DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
|
|
return;
|
|
}
|
|
BUG_ON(!sads);
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
|
|
radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
|
|
|
|
kfree(sads);
|
|
}
|
|
|
|
static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
|
|
{
|
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
u8 *sadb = NULL;
|
|
int sad_count;
|
|
|
|
if (!connector)
|
|
return;
|
|
|
|
sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector),
|
|
&sadb);
|
|
if (sad_count < 0) {
|
|
DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
|
|
sad_count);
|
|
sad_count = 0;
|
|
}
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
|
|
radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
|
|
|
|
kfree(sadb);
|
|
}
|
|
|
|
static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
|
|
if (!connector)
|
|
return;
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
|
|
radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
|
|
}
|
|
|
|
struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
|
|
{
|
|
struct radeon_device *rdev = encoder->dev->dev_private;
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
|
|
return radeon_encoder->audio->get_pin(rdev);
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static void radeon_audio_select_pin(struct drm_encoder *encoder)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
|
|
radeon_encoder->audio->select_pin(encoder);
|
|
}
|
|
|
|
void radeon_audio_detect(struct drm_connector *connector,
|
|
struct drm_encoder *encoder,
|
|
enum drm_connector_status status)
|
|
{
|
|
struct drm_device *dev = connector->dev;
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig;
|
|
|
|
if (!radeon_audio_chipset_supported(rdev))
|
|
return;
|
|
|
|
if (!radeon_encoder_is_digital(encoder))
|
|
return;
|
|
|
|
dig = radeon_encoder->enc_priv;
|
|
|
|
if (status == connector_status_connected) {
|
|
if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
|
|
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
|
|
|
|
if (radeon_dp_getsinktype(radeon_connector) ==
|
|
CONNECTOR_OBJECT_ID_DISPLAYPORT)
|
|
radeon_encoder->audio = rdev->audio.dp_funcs;
|
|
else
|
|
radeon_encoder->audio = rdev->audio.hdmi_funcs;
|
|
} else {
|
|
radeon_encoder->audio = rdev->audio.hdmi_funcs;
|
|
}
|
|
|
|
if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
|
|
if (!dig->pin)
|
|
dig->pin = radeon_audio_get_pin(encoder);
|
|
radeon_audio_enable(rdev, dig->pin, 0xf);
|
|
} else {
|
|
radeon_audio_enable(rdev, dig->pin, 0);
|
|
dig->pin = NULL;
|
|
}
|
|
} else {
|
|
radeon_audio_enable(rdev, dig->pin, 0);
|
|
dig->pin = NULL;
|
|
}
|
|
}
|
|
|
|
void radeon_audio_fini(struct radeon_device *rdev)
|
|
{
|
|
int i;
|
|
|
|
if (!rdev->audio.enabled)
|
|
return;
|
|
|
|
for (i = 0; i < rdev->audio.num_pins; i++)
|
|
radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
|
|
|
|
rdev->audio.enabled = false;
|
|
}
|
|
|
|
static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
|
|
{
|
|
struct radeon_device *rdev = encoder->dev->dev_private;
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
|
|
radeon_encoder->audio->set_dto(rdev, crtc, clock);
|
|
}
|
|
|
|
static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
struct radeon_device *rdev = encoder->dev->dev_private;
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|
u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
|
|
struct hdmi_avi_infoframe frame;
|
|
int err;
|
|
|
|
if (!connector)
|
|
return -EINVAL;
|
|
|
|
err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);
|
|
if (err < 0) {
|
|
DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
|
|
return err;
|
|
}
|
|
|
|
if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) {
|
|
if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) {
|
|
if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB)
|
|
frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED;
|
|
else
|
|
frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL;
|
|
} else {
|
|
frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
|
|
}
|
|
}
|
|
|
|
err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
|
|
if (err < 0) {
|
|
DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
|
|
return err;
|
|
}
|
|
|
|
if (dig && dig->afmt && radeon_encoder->audio &&
|
|
radeon_encoder->audio->set_avi_packet)
|
|
radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
|
|
buffer, sizeof(buffer));
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* calculate CTS and N values if they are not found in the table
|
|
*/
|
|
static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
|
|
{
|
|
int n, cts;
|
|
unsigned long div, mul;
|
|
|
|
/* Safe, but overly large values */
|
|
n = 128 * freq;
|
|
cts = clock * 1000;
|
|
|
|
/* Smallest valid fraction */
|
|
div = gcd(n, cts);
|
|
|
|
n /= div;
|
|
cts /= div;
|
|
|
|
/*
|
|
* The optimal N is 128*freq/1000. Calculate the closest larger
|
|
* value that doesn't truncate any bits.
|
|
*/
|
|
mul = ((128*freq/1000) + (n-1))/n;
|
|
|
|
n *= mul;
|
|
cts *= mul;
|
|
|
|
/* Check that we are in spec (not always possible) */
|
|
if (n < (128*freq/1500))
|
|
pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n");
|
|
if (n > (128*freq/300))
|
|
pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n");
|
|
|
|
*N = n;
|
|
*CTS = cts;
|
|
|
|
DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
|
|
*N, *CTS, freq);
|
|
}
|
|
|
|
static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
|
|
{
|
|
static struct radeon_hdmi_acr res;
|
|
u8 i;
|
|
|
|
static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
|
|
/* 32kHz 44.1kHz 48kHz */
|
|
/* Clock N CTS N CTS N CTS */
|
|
{ 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
|
|
{ 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
|
|
{ 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
|
|
{ 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
|
|
{ 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
|
|
{ 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
|
|
{ 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
|
|
{ 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
|
|
{ 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
|
|
{ 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
|
|
};
|
|
|
|
/* Precalculated values for common clocks */
|
|
for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
|
|
if (hdmi_predefined_acr[i].clock == clock)
|
|
return &hdmi_predefined_acr[i];
|
|
|
|
/* And odd clocks get manually calculated */
|
|
radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
|
|
radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
|
|
radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
|
|
|
|
return &res;
|
|
}
|
|
|
|
/*
|
|
* update the N and CTS parameters for a given pixel clock rate
|
|
*/
|
|
static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
|
|
{
|
|
const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
|
|
radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
|
|
}
|
|
|
|
static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
|
|
radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
|
|
}
|
|
|
|
static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
|
|
{
|
|
int bpc = 8;
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (encoder->crtc) {
|
|
struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
|
|
bpc = radeon_crtc->bpc;
|
|
}
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
|
|
radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
|
|
}
|
|
|
|
static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
|
|
radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
|
|
}
|
|
|
|
static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
|
|
radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
|
|
}
|
|
|
|
/*
|
|
* update the info frames with the data from the current display mode
|
|
*/
|
|
static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (!connector)
|
|
return;
|
|
|
|
if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
|
|
radeon_audio_set_mute(encoder, true);
|
|
|
|
radeon_audio_write_speaker_allocation(encoder);
|
|
radeon_audio_write_sad_regs(encoder);
|
|
radeon_audio_write_latency_fields(encoder, mode);
|
|
radeon_audio_set_dto(encoder, mode->clock);
|
|
radeon_audio_set_vbi_packet(encoder);
|
|
radeon_hdmi_set_color_depth(encoder);
|
|
radeon_audio_update_acr(encoder, mode->clock);
|
|
radeon_audio_set_audio_packet(encoder);
|
|
radeon_audio_select_pin(encoder);
|
|
|
|
if (radeon_audio_set_avi_packet(encoder, mode) < 0)
|
|
return;
|
|
|
|
radeon_audio_set_mute(encoder, false);
|
|
} else {
|
|
radeon_hdmi_set_color_depth(encoder);
|
|
|
|
if (radeon_audio_set_avi_packet(encoder, mode) < 0)
|
|
return;
|
|
}
|
|
}
|
|
|
|
static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
struct drm_device *dev = encoder->dev;
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
|
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
|
|
|
|
if (!dig || !dig->afmt)
|
|
return;
|
|
|
|
if (!connector)
|
|
return;
|
|
|
|
if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
|
|
radeon_audio_write_speaker_allocation(encoder);
|
|
radeon_audio_write_sad_regs(encoder);
|
|
radeon_audio_write_latency_fields(encoder, mode);
|
|
radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);
|
|
radeon_audio_set_audio_packet(encoder);
|
|
radeon_audio_select_pin(encoder);
|
|
|
|
if (radeon_audio_set_avi_packet(encoder, mode) < 0)
|
|
return;
|
|
}
|
|
}
|
|
|
|
void radeon_audio_mode_set(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
|
|
radeon_encoder->audio->mode_set(encoder, mode);
|
|
}
|
|
|
|
void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
|
|
{
|
|
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
|
|
|
|
if (radeon_encoder->audio && radeon_encoder->audio->dpms)
|
|
radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
|
|
}
|
|
|
|
unsigned int radeon_audio_decode_dfs_div(unsigned int div)
|
|
{
|
|
if (div >= 8 && div < 64)
|
|
return (div - 8) * 25 + 200;
|
|
else if (div >= 64 && div < 96)
|
|
return (div - 64) * 50 + 1600;
|
|
else if (div >= 96 && div < 128)
|
|
return (div - 96) * 100 + 3200;
|
|
else
|
|
return 0;
|
|
}
|