![Benjamin Gaignard](/assets/img/avatar_default.png)
Add SPDX identifiers to files under sti directory Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Vincent Abriou <vincent.abriou@st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171206112947.9569-2-benjamin.gaignard@st.com
599 lines
15 KiB
C
599 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/debugfs.h>
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#include <linux/module.h>
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#include <linux/of_gpio.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_panel.h>
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#include "sti_awg_utils.h"
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#include "sti_drv.h"
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#include "sti_mixer.h"
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/* DVO registers */
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#define DVO_AWG_DIGSYNC_CTRL 0x0000
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#define DVO_DOF_CFG 0x0004
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#define DVO_LUT_PROG_LOW 0x0008
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#define DVO_LUT_PROG_MID 0x000C
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#define DVO_LUT_PROG_HIGH 0x0010
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#define DVO_DIGSYNC_INSTR_I 0x0100
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#define DVO_AWG_CTRL_EN BIT(0)
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#define DVO_AWG_FRAME_BASED_SYNC BIT(2)
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#define DVO_DOF_EN_LOWBYTE BIT(0)
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#define DVO_DOF_EN_MIDBYTE BIT(1)
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#define DVO_DOF_EN_HIGHBYTE BIT(2)
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#define DVO_DOF_EN BIT(6)
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#define DVO_DOF_MOD_COUNT_SHIFT 8
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#define DVO_LUT_ZERO 0
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#define DVO_LUT_Y_G 1
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#define DVO_LUT_Y_G_DEL 2
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#define DVO_LUT_CB_B 3
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#define DVO_LUT_CB_B_DEL 4
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#define DVO_LUT_CR_R 5
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#define DVO_LUT_CR_R_DEL 6
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#define DVO_LUT_HOLD 7
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struct dvo_config {
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u32 flags;
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u32 lowbyte;
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u32 midbyte;
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u32 highbyte;
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int (*awg_fwgen_fct)(
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struct awg_code_generation_params *fw_gen_params,
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struct awg_timing *timing);
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};
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static struct dvo_config rgb_24bit_de_cfg = {
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.flags = (0L << DVO_DOF_MOD_COUNT_SHIFT),
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.lowbyte = DVO_LUT_CR_R,
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.midbyte = DVO_LUT_Y_G,
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.highbyte = DVO_LUT_CB_B,
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.awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
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};
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/**
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* STI digital video output structure
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*
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* @dev: driver device
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* @drm_dev: pointer to drm device
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* @mode: current display mode selected
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* @regs: dvo registers
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* @clk_pix: pixel clock for dvo
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* @clk: clock for dvo
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* @clk_main_parent: dvo parent clock if main path used
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* @clk_aux_parent: dvo parent clock if aux path used
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* @panel_node: panel node reference from device tree
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* @panel: reference to the panel connected to the dvo
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* @enabled: true if dvo is enabled else false
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* @encoder: drm_encoder it is bound
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*/
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struct sti_dvo {
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struct device dev;
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struct drm_device *drm_dev;
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struct drm_display_mode mode;
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void __iomem *regs;
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struct clk *clk_pix;
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struct clk *clk;
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struct clk *clk_main_parent;
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struct clk *clk_aux_parent;
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struct device_node *panel_node;
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struct drm_panel *panel;
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struct dvo_config *config;
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bool enabled;
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struct drm_encoder *encoder;
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struct drm_bridge *bridge;
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};
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struct sti_dvo_connector {
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struct drm_connector drm_connector;
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struct drm_encoder *encoder;
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struct sti_dvo *dvo;
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};
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#define to_sti_dvo_connector(x) \
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container_of(x, struct sti_dvo_connector, drm_connector)
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#define BLANKING_LEVEL 16
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static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
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{
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struct drm_display_mode *mode = &dvo->mode;
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struct dvo_config *config = dvo->config;
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struct awg_code_generation_params fw_gen_params;
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struct awg_timing timing;
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fw_gen_params.ram_code = ram_code;
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fw_gen_params.instruction_offset = 0;
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timing.total_lines = mode->vtotal;
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timing.active_lines = mode->vdisplay;
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timing.blanking_lines = mode->vsync_start - mode->vdisplay;
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timing.trailing_lines = mode->vtotal - mode->vsync_start;
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timing.total_pixels = mode->htotal;
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timing.active_pixels = mode->hdisplay;
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timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
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timing.trailing_pixels = mode->htotal - mode->hsync_start;
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timing.blanking_level = BLANKING_LEVEL;
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if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
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DRM_ERROR("AWG firmware not properly generated\n");
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return -EINVAL;
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}
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*ram_size = fw_gen_params.instruction_offset;
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return 0;
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}
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/* Configure AWG, writing instructions
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*
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* @dvo: pointer to DVO structure
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* @awg_ram_code: pointer to AWG instructions table
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* @nb: nb of AWG instructions
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*/
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static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
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{
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int i;
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DRM_DEBUG_DRIVER("\n");
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for (i = 0; i < nb; i++)
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writel(awg_ram_code[i],
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dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
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for (i = nb; i < AWG_MAX_INST; i++)
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writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
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writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
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}
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#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
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readl(dvo->regs + reg))
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static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
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{
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unsigned int i;
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seq_puts(s, "\n\n");
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seq_puts(s, " DVO AWG microcode:");
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for (i = 0; i < AWG_MAX_INST; i++) {
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if (i % 8 == 0)
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seq_printf(s, "\n %04X:", i);
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seq_printf(s, " %04X", readl(reg + i * 4));
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}
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}
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static int dvo_dbg_show(struct seq_file *s, void *data)
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{
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struct drm_info_node *node = s->private;
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struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
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seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
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DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
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DBGFS_DUMP(DVO_DOF_CFG);
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DBGFS_DUMP(DVO_LUT_PROG_LOW);
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DBGFS_DUMP(DVO_LUT_PROG_MID);
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DBGFS_DUMP(DVO_LUT_PROG_HIGH);
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dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
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seq_putc(s, '\n');
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return 0;
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}
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static struct drm_info_list dvo_debugfs_files[] = {
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{ "dvo", dvo_dbg_show, 0, NULL },
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};
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static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
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dvo_debugfs_files[i].data = dvo;
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return drm_debugfs_create_files(dvo_debugfs_files,
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ARRAY_SIZE(dvo_debugfs_files),
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minor->debugfs_root, minor);
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}
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static void sti_dvo_disable(struct drm_bridge *bridge)
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{
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struct sti_dvo *dvo = bridge->driver_private;
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if (!dvo->enabled)
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return;
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DRM_DEBUG_DRIVER("\n");
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if (dvo->config->awg_fwgen_fct)
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writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
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writel(0x00000000, dvo->regs + DVO_DOF_CFG);
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if (dvo->panel)
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dvo->panel->funcs->disable(dvo->panel);
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/* Disable/unprepare dvo clock */
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clk_disable_unprepare(dvo->clk_pix);
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clk_disable_unprepare(dvo->clk);
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dvo->enabled = false;
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}
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static void sti_dvo_pre_enable(struct drm_bridge *bridge)
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{
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struct sti_dvo *dvo = bridge->driver_private;
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struct dvo_config *config = dvo->config;
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u32 val;
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DRM_DEBUG_DRIVER("\n");
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if (dvo->enabled)
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return;
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/* Make sure DVO is disabled */
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writel(0x00000000, dvo->regs + DVO_DOF_CFG);
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writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
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if (config->awg_fwgen_fct) {
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u8 nb_instr;
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u32 awg_ram_code[AWG_MAX_INST];
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/* Configure AWG */
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if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
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dvo_awg_configure(dvo, awg_ram_code, nb_instr);
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else
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return;
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}
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/* Prepare/enable clocks */
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if (clk_prepare_enable(dvo->clk_pix))
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DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
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if (clk_prepare_enable(dvo->clk))
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DRM_ERROR("Failed to prepare/enable dvo clk\n");
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if (dvo->panel)
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dvo->panel->funcs->enable(dvo->panel);
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/* Set LUT */
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writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW);
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writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID);
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writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
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/* Digital output formatter config */
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val = (config->flags | DVO_DOF_EN);
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writel(val, dvo->regs + DVO_DOF_CFG);
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dvo->enabled = true;
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}
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static void sti_dvo_set_mode(struct drm_bridge *bridge,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct sti_dvo *dvo = bridge->driver_private;
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struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
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int rate = mode->clock * 1000;
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struct clk *clkp;
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int ret;
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DRM_DEBUG_DRIVER("\n");
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memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode));
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/* According to the path used (main or aux), the dvo clocks should
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* have a different parent clock. */
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if (mixer->id == STI_MIXER_MAIN)
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clkp = dvo->clk_main_parent;
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else
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clkp = dvo->clk_aux_parent;
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if (clkp) {
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clk_set_parent(dvo->clk_pix, clkp);
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clk_set_parent(dvo->clk, clkp);
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}
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/* DVO clocks = compositor clock */
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ret = clk_set_rate(dvo->clk_pix, rate);
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if (ret < 0) {
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DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
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return;
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}
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ret = clk_set_rate(dvo->clk, rate);
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if (ret < 0) {
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DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
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return;
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}
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/* For now, we only support 24bit data enable (DE) synchro format */
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dvo->config = &rgb_24bit_de_cfg;
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}
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static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
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{
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/* do nothing */
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}
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static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
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.pre_enable = sti_dvo_pre_enable,
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.enable = sti_dvo_bridge_nope,
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.disable = sti_dvo_disable,
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.post_disable = sti_dvo_bridge_nope,
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.mode_set = sti_dvo_set_mode,
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};
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static int sti_dvo_connector_get_modes(struct drm_connector *connector)
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{
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struct sti_dvo_connector *dvo_connector
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= to_sti_dvo_connector(connector);
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struct sti_dvo *dvo = dvo_connector->dvo;
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if (dvo->panel)
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return dvo->panel->funcs->get_modes(dvo->panel);
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return 0;
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}
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#define CLK_TOLERANCE_HZ 50
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static int sti_dvo_connector_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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int target = mode->clock * 1000;
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int target_min = target - CLK_TOLERANCE_HZ;
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int target_max = target + CLK_TOLERANCE_HZ;
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int result;
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struct sti_dvo_connector *dvo_connector
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= to_sti_dvo_connector(connector);
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struct sti_dvo *dvo = dvo_connector->dvo;
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result = clk_round_rate(dvo->clk_pix, target);
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DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
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target, result);
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if ((result < target_min) || (result > target_max)) {
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DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
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return MODE_BAD;
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}
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return MODE_OK;
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}
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static const
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struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
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.get_modes = sti_dvo_connector_get_modes,
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.mode_valid = sti_dvo_connector_mode_valid,
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};
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static enum drm_connector_status
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sti_dvo_connector_detect(struct drm_connector *connector, bool force)
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{
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struct sti_dvo_connector *dvo_connector
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= to_sti_dvo_connector(connector);
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struct sti_dvo *dvo = dvo_connector->dvo;
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DRM_DEBUG_DRIVER("\n");
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if (!dvo->panel) {
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dvo->panel = of_drm_find_panel(dvo->panel_node);
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if (dvo->panel)
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drm_panel_attach(dvo->panel, connector);
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}
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if (dvo->panel)
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return connector_status_connected;
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return connector_status_disconnected;
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}
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static int sti_dvo_late_register(struct drm_connector *connector)
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{
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struct sti_dvo_connector *dvo_connector
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= to_sti_dvo_connector(connector);
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struct sti_dvo *dvo = dvo_connector->dvo;
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if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) {
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DRM_ERROR("DVO debugfs setup failed\n");
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return -EINVAL;
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}
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return 0;
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}
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static const struct drm_connector_funcs sti_dvo_connector_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.detect = sti_dvo_connector_detect,
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.destroy = drm_connector_cleanup,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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.late_register = sti_dvo_late_register,
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};
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static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
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{
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struct drm_encoder *encoder;
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
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return encoder;
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}
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return NULL;
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}
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static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
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{
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struct sti_dvo *dvo = dev_get_drvdata(dev);
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struct drm_device *drm_dev = data;
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struct drm_encoder *encoder;
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struct sti_dvo_connector *connector;
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struct drm_connector *drm_connector;
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struct drm_bridge *bridge;
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int err;
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/* Set the drm device handle */
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dvo->drm_dev = drm_dev;
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encoder = sti_dvo_find_encoder(drm_dev);
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if (!encoder)
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return -ENOMEM;
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connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
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if (!connector)
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return -ENOMEM;
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connector->dvo = dvo;
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bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
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if (!bridge)
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return -ENOMEM;
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bridge->driver_private = dvo;
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bridge->funcs = &sti_dvo_bridge_funcs;
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bridge->of_node = dvo->dev.of_node;
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drm_bridge_add(bridge);
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err = drm_bridge_attach(encoder, bridge, NULL);
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if (err) {
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DRM_ERROR("Failed to attach bridge\n");
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return err;
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}
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dvo->bridge = bridge;
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connector->encoder = encoder;
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dvo->encoder = encoder;
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drm_connector = (struct drm_connector *)connector;
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drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
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drm_connector_init(drm_dev, drm_connector,
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&sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
|
|
drm_connector_helper_add(drm_connector,
|
|
&sti_dvo_connector_helper_funcs);
|
|
|
|
err = drm_mode_connector_attach_encoder(drm_connector, encoder);
|
|
if (err) {
|
|
DRM_ERROR("Failed to attach a connector to a encoder\n");
|
|
goto err_sysfs;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_sysfs:
|
|
drm_bridge_remove(bridge);
|
|
return -EINVAL;
|
|
}
|
|
|
|
static void sti_dvo_unbind(struct device *dev,
|
|
struct device *master, void *data)
|
|
{
|
|
struct sti_dvo *dvo = dev_get_drvdata(dev);
|
|
|
|
drm_bridge_remove(dvo->bridge);
|
|
}
|
|
|
|
static const struct component_ops sti_dvo_ops = {
|
|
.bind = sti_dvo_bind,
|
|
.unbind = sti_dvo_unbind,
|
|
};
|
|
|
|
static int sti_dvo_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct sti_dvo *dvo;
|
|
struct resource *res;
|
|
struct device_node *np = dev->of_node;
|
|
|
|
DRM_INFO("%s\n", __func__);
|
|
|
|
dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
|
|
if (!dvo) {
|
|
DRM_ERROR("Failed to allocate memory for DVO\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
dvo->dev = pdev->dev;
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
|
|
if (!res) {
|
|
DRM_ERROR("Invalid dvo resource\n");
|
|
return -ENOMEM;
|
|
}
|
|
dvo->regs = devm_ioremap_nocache(dev, res->start,
|
|
resource_size(res));
|
|
if (!dvo->regs)
|
|
return -ENOMEM;
|
|
|
|
dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
|
|
if (IS_ERR(dvo->clk_pix)) {
|
|
DRM_ERROR("Cannot get dvo_pix clock\n");
|
|
return PTR_ERR(dvo->clk_pix);
|
|
}
|
|
|
|
dvo->clk = devm_clk_get(dev, "dvo");
|
|
if (IS_ERR(dvo->clk)) {
|
|
DRM_ERROR("Cannot get dvo clock\n");
|
|
return PTR_ERR(dvo->clk);
|
|
}
|
|
|
|
dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
|
|
if (IS_ERR(dvo->clk_main_parent)) {
|
|
DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
|
|
dvo->clk_main_parent = NULL;
|
|
}
|
|
|
|
dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
|
|
if (IS_ERR(dvo->clk_aux_parent)) {
|
|
DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
|
|
dvo->clk_aux_parent = NULL;
|
|
}
|
|
|
|
dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
|
|
if (!dvo->panel_node)
|
|
DRM_ERROR("No panel associated to the dvo output\n");
|
|
of_node_put(dvo->panel_node);
|
|
|
|
platform_set_drvdata(pdev, dvo);
|
|
|
|
return component_add(&pdev->dev, &sti_dvo_ops);
|
|
}
|
|
|
|
static int sti_dvo_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &sti_dvo_ops);
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id dvo_of_match[] = {
|
|
{ .compatible = "st,stih407-dvo", },
|
|
{ /* end node */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, dvo_of_match);
|
|
|
|
struct platform_driver sti_dvo_driver = {
|
|
.driver = {
|
|
.name = "sti-dvo",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = dvo_of_match,
|
|
},
|
|
.probe = sti_dvo_probe,
|
|
.remove = sti_dvo_remove,
|
|
};
|
|
|
|
MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
|
|
MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
|
|
MODULE_LICENSE("GPL");
|