![Ville Syrjälä](/assets/img/avatar_default.png)
Appedix F of HDMI 2.0 says that some HDMI sink may fail to switch from 3D to 2D mode in a timely fashion if the source simply stops sending the HDMI infoframe. The suggested workaround is to keep sending the infoframe even when strictly not necessary (ie. no VIC and no S3D). HDMI 1.4 does allow for this behaviour, stating that sending the infoframe is optional in this case. The infoframe was first specified in HDMI 1.4, so in theory sinks predating that may not appreciate us sending an uknown infoframe their way. To avoid regressions let's try to determine if the sink supports the infoframe or not. Unfortunately there's no direct way to do that, so instead we'll just check if we managed to parse any HDMI 1.4 4k or stereo modes from the EDID, and if so we assume the sink will accept the infoframe. Also if the EDID contains the HDMI 2.0 HDMI Forum VSDB we can assume the sink is prepared to receive the infoframe. v2: Fix getting has_hdmi_infoframe from display_info Always fail constructing the infoframe if the display possibly can't handle it Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171113170427.4150-3-ville.syrjala@linux.intel.com
764 lines
18 KiB
C
764 lines
18 KiB
C
/*
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* Copyright 2016 Linaro Ltd.
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* Copyright 2016 ZTE Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/hdmi.h>
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#include <linux/irq.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of_device.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_of.h>
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#include <drm/drmP.h>
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#include <sound/hdmi-codec.h>
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#include "zx_hdmi_regs.h"
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#include "zx_vou.h"
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#define ZX_HDMI_INFOFRAME_SIZE 31
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#define DDC_SEGMENT_ADDR 0x30
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struct zx_hdmi_i2c {
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struct i2c_adapter adap;
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struct mutex lock;
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};
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struct zx_hdmi {
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struct drm_connector connector;
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struct drm_encoder encoder;
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struct zx_hdmi_i2c *ddc;
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struct device *dev;
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struct drm_device *drm;
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void __iomem *mmio;
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struct clk *cec_clk;
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struct clk *osc_clk;
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struct clk *xclk;
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bool sink_is_hdmi;
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bool sink_has_audio;
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struct platform_device *audio_pdev;
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};
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#define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
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static inline u8 hdmi_readb(struct zx_hdmi *hdmi, u16 offset)
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{
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return readl_relaxed(hdmi->mmio + offset * 4);
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}
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static inline void hdmi_writeb(struct zx_hdmi *hdmi, u16 offset, u8 val)
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{
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writel_relaxed(val, hdmi->mmio + offset * 4);
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}
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static inline void hdmi_writeb_mask(struct zx_hdmi *hdmi, u16 offset,
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u8 mask, u8 val)
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{
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u8 tmp;
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tmp = hdmi_readb(hdmi, offset);
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tmp = (tmp & ~mask) | (val & mask);
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hdmi_writeb(hdmi, offset, tmp);
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}
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static int zx_hdmi_infoframe_trans(struct zx_hdmi *hdmi,
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union hdmi_infoframe *frame, u8 fsel)
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{
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u8 buffer[ZX_HDMI_INFOFRAME_SIZE];
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int num;
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int i;
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hdmi_writeb(hdmi, TPI_INFO_FSEL, fsel);
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num = hdmi_infoframe_pack(frame, buffer, ZX_HDMI_INFOFRAME_SIZE);
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if (num < 0) {
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DRM_DEV_ERROR(hdmi->dev, "failed to pack infoframe: %d\n", num);
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return num;
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}
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for (i = 0; i < num; i++)
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hdmi_writeb(hdmi, TPI_INFO_B0 + i, buffer[i]);
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hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_RPT,
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TPI_INFO_TRANS_RPT);
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hdmi_writeb_mask(hdmi, TPI_INFO_EN, TPI_INFO_TRANS_EN,
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TPI_INFO_TRANS_EN);
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return num;
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}
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static int zx_hdmi_config_video_vsi(struct zx_hdmi *hdmi,
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struct drm_display_mode *mode)
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{
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union hdmi_infoframe frame;
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int ret;
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ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
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&hdmi->connector,
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mode);
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if (ret) {
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DRM_DEV_ERROR(hdmi->dev, "failed to get vendor infoframe: %d\n",
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ret);
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return ret;
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}
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return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_VSIF);
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}
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static int zx_hdmi_config_video_avi(struct zx_hdmi *hdmi,
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struct drm_display_mode *mode)
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{
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union hdmi_infoframe frame;
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int ret;
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ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode, false);
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if (ret) {
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DRM_DEV_ERROR(hdmi->dev, "failed to get avi infoframe: %d\n",
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ret);
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return ret;
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}
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/* We always use YUV444 for HDMI output. */
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frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
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return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AVI);
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}
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static void zx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adj_mode)
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{
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struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
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if (hdmi->sink_is_hdmi) {
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zx_hdmi_config_video_avi(hdmi, mode);
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zx_hdmi_config_video_vsi(hdmi, mode);
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}
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}
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static void zx_hdmi_phy_start(struct zx_hdmi *hdmi)
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{
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/* Copy from ZTE BSP code */
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hdmi_writeb(hdmi, 0x222, 0x0);
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hdmi_writeb(hdmi, 0x224, 0x4);
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hdmi_writeb(hdmi, 0x909, 0x0);
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hdmi_writeb(hdmi, 0x7b0, 0x90);
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hdmi_writeb(hdmi, 0x7b1, 0x00);
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hdmi_writeb(hdmi, 0x7b2, 0xa7);
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hdmi_writeb(hdmi, 0x7b8, 0xaa);
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hdmi_writeb(hdmi, 0x7b2, 0xa7);
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hdmi_writeb(hdmi, 0x7b3, 0x0f);
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hdmi_writeb(hdmi, 0x7b4, 0x0f);
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hdmi_writeb(hdmi, 0x7b5, 0x55);
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hdmi_writeb(hdmi, 0x7b7, 0x03);
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hdmi_writeb(hdmi, 0x7b9, 0x12);
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hdmi_writeb(hdmi, 0x7ba, 0x32);
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hdmi_writeb(hdmi, 0x7bc, 0x68);
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hdmi_writeb(hdmi, 0x7be, 0x40);
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hdmi_writeb(hdmi, 0x7bf, 0x84);
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hdmi_writeb(hdmi, 0x7c1, 0x0f);
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hdmi_writeb(hdmi, 0x7c8, 0x02);
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hdmi_writeb(hdmi, 0x7c9, 0x03);
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hdmi_writeb(hdmi, 0x7ca, 0x40);
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hdmi_writeb(hdmi, 0x7dc, 0x31);
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hdmi_writeb(hdmi, 0x7e2, 0x04);
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hdmi_writeb(hdmi, 0x7e0, 0x06);
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hdmi_writeb(hdmi, 0x7cb, 0x68);
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hdmi_writeb(hdmi, 0x7f9, 0x02);
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hdmi_writeb(hdmi, 0x7b6, 0x02);
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hdmi_writeb(hdmi, 0x7f3, 0x0);
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}
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static void zx_hdmi_hw_enable(struct zx_hdmi *hdmi)
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{
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/* Enable pclk */
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hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, CLKPWD_PDIDCK);
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/* Enable HDMI for TX */
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hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, FUNC_HDMI_EN);
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/* Enable deep color packet */
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hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
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/* Enable HDMI/MHL mode for output */
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hdmi_writeb_mask(hdmi, TEST_TXCTRL, TEST_TXCTRL_HDMI_MODE,
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TEST_TXCTRL_HDMI_MODE);
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/* Configure reg_qc_sel */
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hdmi_writeb(hdmi, HDMICTL4, 0x3);
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/* Enable interrupt */
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hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT,
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INTR1_MONITOR_DETECT);
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/* Start up phy */
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zx_hdmi_phy_start(hdmi);
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}
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static void zx_hdmi_hw_disable(struct zx_hdmi *hdmi)
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{
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/* Disable interrupt */
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hdmi_writeb_mask(hdmi, INTR1_MASK, INTR1_MONITOR_DETECT, 0);
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/* Disable deep color packet */
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hdmi_writeb_mask(hdmi, P2T_CTRL, P2T_DC_PKT_EN, P2T_DC_PKT_EN);
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/* Disable HDMI for TX */
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hdmi_writeb_mask(hdmi, FUNC_SEL, FUNC_HDMI_EN, 0);
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/* Disable pclk */
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hdmi_writeb_mask(hdmi, CLKPWD, CLKPWD_PDIDCK, 0);
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}
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static void zx_hdmi_encoder_enable(struct drm_encoder *encoder)
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{
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struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
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clk_prepare_enable(hdmi->cec_clk);
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clk_prepare_enable(hdmi->osc_clk);
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clk_prepare_enable(hdmi->xclk);
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zx_hdmi_hw_enable(hdmi);
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vou_inf_enable(VOU_HDMI, encoder->crtc);
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}
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static void zx_hdmi_encoder_disable(struct drm_encoder *encoder)
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{
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struct zx_hdmi *hdmi = to_zx_hdmi(encoder);
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vou_inf_disable(VOU_HDMI, encoder->crtc);
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zx_hdmi_hw_disable(hdmi);
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clk_disable_unprepare(hdmi->xclk);
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clk_disable_unprepare(hdmi->osc_clk);
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clk_disable_unprepare(hdmi->cec_clk);
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}
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static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs = {
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.enable = zx_hdmi_encoder_enable,
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.disable = zx_hdmi_encoder_disable,
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.mode_set = zx_hdmi_encoder_mode_set,
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};
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static const struct drm_encoder_funcs zx_hdmi_encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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static int zx_hdmi_connector_get_modes(struct drm_connector *connector)
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{
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struct zx_hdmi *hdmi = to_zx_hdmi(connector);
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struct edid *edid;
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int ret;
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edid = drm_get_edid(connector, &hdmi->ddc->adap);
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if (!edid)
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return 0;
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hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
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hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
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drm_mode_connector_update_edid_property(connector, edid);
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ret = drm_add_edid_modes(connector, edid);
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kfree(edid);
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return ret;
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}
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static enum drm_mode_status
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zx_hdmi_connector_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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return MODE_OK;
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}
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static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs = {
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.get_modes = zx_hdmi_connector_get_modes,
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.mode_valid = zx_hdmi_connector_mode_valid,
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};
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static enum drm_connector_status
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zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
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{
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struct zx_hdmi *hdmi = to_zx_hdmi(connector);
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return (hdmi_readb(hdmi, TPI_HPD_RSEN) & TPI_HPD_CONNECTION) ?
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connector_status_connected : connector_status_disconnected;
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}
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static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.detect = zx_hdmi_connector_detect,
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.destroy = drm_connector_cleanup,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static int zx_hdmi_register(struct drm_device *drm, struct zx_hdmi *hdmi)
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{
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struct drm_encoder *encoder = &hdmi->encoder;
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encoder->possible_crtcs = VOU_CRTC_MASK;
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drm_encoder_init(drm, encoder, &zx_hdmi_encoder_funcs,
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DRM_MODE_ENCODER_TMDS, NULL);
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drm_encoder_helper_add(encoder, &zx_hdmi_encoder_helper_funcs);
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hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
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drm_connector_init(drm, &hdmi->connector, &zx_hdmi_connector_funcs,
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DRM_MODE_CONNECTOR_HDMIA);
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drm_connector_helper_add(&hdmi->connector,
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&zx_hdmi_connector_helper_funcs);
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drm_mode_connector_attach_encoder(&hdmi->connector, encoder);
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return 0;
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}
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static irqreturn_t zx_hdmi_irq_thread(int irq, void *dev_id)
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{
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struct zx_hdmi *hdmi = dev_id;
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drm_helper_hpd_irq_event(hdmi->connector.dev);
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return IRQ_HANDLED;
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}
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static irqreturn_t zx_hdmi_irq_handler(int irq, void *dev_id)
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{
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struct zx_hdmi *hdmi = dev_id;
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u8 lstat;
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lstat = hdmi_readb(hdmi, L1_INTR_STAT);
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/* Monitor detect/HPD interrupt */
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if (lstat & L1_INTR_STAT_INTR1) {
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u8 stat;
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stat = hdmi_readb(hdmi, INTR1_STAT);
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hdmi_writeb(hdmi, INTR1_STAT, stat);
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if (stat & INTR1_MONITOR_DETECT)
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return IRQ_WAKE_THREAD;
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}
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return IRQ_NONE;
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}
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static int zx_hdmi_audio_startup(struct device *dev, void *data)
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{
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struct zx_hdmi *hdmi = dev_get_drvdata(dev);
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struct drm_encoder *encoder = &hdmi->encoder;
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vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF);
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return 0;
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}
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static void zx_hdmi_audio_shutdown(struct device *dev, void *data)
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{
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struct zx_hdmi *hdmi = dev_get_drvdata(dev);
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/* Disable audio input */
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hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, 0);
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}
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static inline int zx_hdmi_audio_get_n(unsigned int fs)
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{
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unsigned int n;
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if (fs && (fs % 44100) == 0)
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n = 6272 * (fs / 44100);
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else
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n = fs * 128 / 1000;
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return n;
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}
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static int zx_hdmi_audio_hw_params(struct device *dev,
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void *data,
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struct hdmi_codec_daifmt *daifmt,
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struct hdmi_codec_params *params)
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{
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struct zx_hdmi *hdmi = dev_get_drvdata(dev);
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struct hdmi_audio_infoframe *cea = ¶ms->cea;
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union hdmi_infoframe frame;
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int n;
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/* We only support spdif for now */
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if (daifmt->fmt != HDMI_SPDIF) {
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DRM_DEV_ERROR(hdmi->dev, "invalid daifmt %d\n", daifmt->fmt);
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return -EINVAL;
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}
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switch (params->sample_width) {
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case 16:
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hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
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SPDIF_SAMPLE_SIZE_16BIT);
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break;
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case 20:
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hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
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SPDIF_SAMPLE_SIZE_20BIT);
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break;
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case 24:
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hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, SPDIF_SAMPLE_SIZE_MASK,
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SPDIF_SAMPLE_SIZE_24BIT);
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break;
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default:
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DRM_DEV_ERROR(hdmi->dev, "invalid sample width %d\n",
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params->sample_width);
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return -EINVAL;
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}
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/* CTS is calculated by hardware, and we only need to take care of N */
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n = zx_hdmi_audio_get_n(params->sample_rate);
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hdmi_writeb(hdmi, N_SVAL1, n & 0xff);
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hdmi_writeb(hdmi, N_SVAL2, (n >> 8) & 0xff);
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hdmi_writeb(hdmi, N_SVAL3, (n >> 16) & 0xf);
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/* Enable spdif mode */
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hdmi_writeb_mask(hdmi, AUD_MODE, SPDIF_EN, SPDIF_EN);
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/* Enable audio input */
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hdmi_writeb_mask(hdmi, AUD_EN, AUD_IN_EN, AUD_IN_EN);
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memcpy(&frame.audio, cea, sizeof(*cea));
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return zx_hdmi_infoframe_trans(hdmi, &frame, FSEL_AUDIO);
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}
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static int zx_hdmi_audio_digital_mute(struct device *dev, void *data,
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bool enable)
|
|
{
|
|
struct zx_hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
if (enable)
|
|
hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE,
|
|
TPI_AUD_MUTE);
|
|
else
|
|
hdmi_writeb_mask(hdmi, TPI_AUD_CONFIG, TPI_AUD_MUTE, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int zx_hdmi_audio_get_eld(struct device *dev, void *data,
|
|
uint8_t *buf, size_t len)
|
|
{
|
|
struct zx_hdmi *hdmi = dev_get_drvdata(dev);
|
|
struct drm_connector *connector = &hdmi->connector;
|
|
|
|
memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct hdmi_codec_ops zx_hdmi_codec_ops = {
|
|
.audio_startup = zx_hdmi_audio_startup,
|
|
.hw_params = zx_hdmi_audio_hw_params,
|
|
.audio_shutdown = zx_hdmi_audio_shutdown,
|
|
.digital_mute = zx_hdmi_audio_digital_mute,
|
|
.get_eld = zx_hdmi_audio_get_eld,
|
|
};
|
|
|
|
static struct hdmi_codec_pdata zx_hdmi_codec_pdata = {
|
|
.ops = &zx_hdmi_codec_ops,
|
|
.spdif = 1,
|
|
};
|
|
|
|
static int zx_hdmi_audio_register(struct zx_hdmi *hdmi)
|
|
{
|
|
struct platform_device *pdev;
|
|
|
|
pdev = platform_device_register_data(hdmi->dev, HDMI_CODEC_DRV_NAME,
|
|
PLATFORM_DEVID_AUTO,
|
|
&zx_hdmi_codec_pdata,
|
|
sizeof(zx_hdmi_codec_pdata));
|
|
if (IS_ERR(pdev))
|
|
return PTR_ERR(pdev);
|
|
|
|
hdmi->audio_pdev = pdev;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int zx_hdmi_i2c_read(struct zx_hdmi *hdmi, struct i2c_msg *msg)
|
|
{
|
|
int len = msg->len;
|
|
u8 *buf = msg->buf;
|
|
int retry = 0;
|
|
int ret = 0;
|
|
|
|
/* Bits [9:8] of bytes */
|
|
hdmi_writeb(hdmi, ZX_DDC_DIN_CNT2, (len >> 8) & 0xff);
|
|
/* Bits [7:0] of bytes */
|
|
hdmi_writeb(hdmi, ZX_DDC_DIN_CNT1, len & 0xff);
|
|
|
|
/* Clear FIFO */
|
|
hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK, DDC_CMD_CLEAR_FIFO);
|
|
|
|
/* Kick off the read */
|
|
hdmi_writeb_mask(hdmi, ZX_DDC_CMD, DDC_CMD_MASK,
|
|
DDC_CMD_SEQUENTIAL_READ);
|
|
|
|
while (len > 0) {
|
|
int cnt, i;
|
|
|
|
/* FIFO needs some time to get ready */
|
|
usleep_range(500, 1000);
|
|
|
|
cnt = hdmi_readb(hdmi, ZX_DDC_DOUT_CNT) & DDC_DOUT_CNT_MASK;
|
|
if (cnt == 0) {
|
|
if (++retry > 5) {
|
|
DRM_DEV_ERROR(hdmi->dev,
|
|
"DDC FIFO read timed out!");
|
|
return -ETIMEDOUT;
|
|
}
|
|
continue;
|
|
}
|
|
|
|
for (i = 0; i < cnt; i++)
|
|
*buf++ = hdmi_readb(hdmi, ZX_DDC_DATA);
|
|
len -= cnt;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int zx_hdmi_i2c_write(struct zx_hdmi *hdmi, struct i2c_msg *msg)
|
|
{
|
|
/*
|
|
* The DDC I2C adapter is only for reading EDID data, so we assume
|
|
* that the write to this adapter must be the EDID data offset.
|
|
*/
|
|
if ((msg->len != 1) ||
|
|
((msg->addr != DDC_ADDR) && (msg->addr != DDC_SEGMENT_ADDR)))
|
|
return -EINVAL;
|
|
|
|
if (msg->addr == DDC_SEGMENT_ADDR)
|
|
hdmi_writeb(hdmi, ZX_DDC_SEGM, msg->addr << 1);
|
|
else if (msg->addr == DDC_ADDR)
|
|
hdmi_writeb(hdmi, ZX_DDC_ADDR, msg->addr << 1);
|
|
|
|
hdmi_writeb(hdmi, ZX_DDC_OFFSET, msg->buf[0]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int zx_hdmi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
|
|
int num)
|
|
{
|
|
struct zx_hdmi *hdmi = i2c_get_adapdata(adap);
|
|
struct zx_hdmi_i2c *ddc = hdmi->ddc;
|
|
int i, ret = 0;
|
|
|
|
mutex_lock(&ddc->lock);
|
|
|
|
/* Enable DDC master access */
|
|
hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, HW_DDC_MASTER);
|
|
|
|
for (i = 0; i < num; i++) {
|
|
DRM_DEV_DEBUG(hdmi->dev,
|
|
"xfer: num: %d/%d, len: %d, flags: %#x\n",
|
|
i + 1, num, msgs[i].len, msgs[i].flags);
|
|
|
|
if (msgs[i].flags & I2C_M_RD)
|
|
ret = zx_hdmi_i2c_read(hdmi, &msgs[i]);
|
|
else
|
|
ret = zx_hdmi_i2c_write(hdmi, &msgs[i]);
|
|
|
|
if (ret < 0)
|
|
break;
|
|
}
|
|
|
|
if (!ret)
|
|
ret = num;
|
|
|
|
/* Disable DDC master access */
|
|
hdmi_writeb_mask(hdmi, TPI_DDC_MASTER_EN, HW_DDC_MASTER, 0);
|
|
|
|
mutex_unlock(&ddc->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static u32 zx_hdmi_i2c_func(struct i2c_adapter *adapter)
|
|
{
|
|
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
|
|
}
|
|
|
|
static const struct i2c_algorithm zx_hdmi_algorithm = {
|
|
.master_xfer = zx_hdmi_i2c_xfer,
|
|
.functionality = zx_hdmi_i2c_func,
|
|
};
|
|
|
|
static int zx_hdmi_ddc_register(struct zx_hdmi *hdmi)
|
|
{
|
|
struct i2c_adapter *adap;
|
|
struct zx_hdmi_i2c *ddc;
|
|
int ret;
|
|
|
|
ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
|
|
if (!ddc)
|
|
return -ENOMEM;
|
|
|
|
hdmi->ddc = ddc;
|
|
mutex_init(&ddc->lock);
|
|
|
|
adap = &ddc->adap;
|
|
adap->owner = THIS_MODULE;
|
|
adap->class = I2C_CLASS_DDC;
|
|
adap->dev.parent = hdmi->dev;
|
|
adap->algo = &zx_hdmi_algorithm;
|
|
snprintf(adap->name, sizeof(adap->name), "zx hdmi i2c");
|
|
|
|
ret = i2c_add_adapter(adap);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(hdmi->dev, "failed to add I2C adapter: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
i2c_set_adapdata(adap, hdmi);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int zx_hdmi_bind(struct device *dev, struct device *master, void *data)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct drm_device *drm = data;
|
|
struct resource *res;
|
|
struct zx_hdmi *hdmi;
|
|
int irq;
|
|
int ret;
|
|
|
|
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
|
|
if (!hdmi)
|
|
return -ENOMEM;
|
|
|
|
hdmi->dev = dev;
|
|
hdmi->drm = drm;
|
|
|
|
dev_set_drvdata(dev, hdmi);
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
hdmi->mmio = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(hdmi->mmio)) {
|
|
ret = PTR_ERR(hdmi->mmio);
|
|
DRM_DEV_ERROR(dev, "failed to remap hdmi region: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
hdmi->cec_clk = devm_clk_get(hdmi->dev, "osc_cec");
|
|
if (IS_ERR(hdmi->cec_clk)) {
|
|
ret = PTR_ERR(hdmi->cec_clk);
|
|
DRM_DEV_ERROR(dev, "failed to get cec_clk: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
hdmi->osc_clk = devm_clk_get(hdmi->dev, "osc_clk");
|
|
if (IS_ERR(hdmi->osc_clk)) {
|
|
ret = PTR_ERR(hdmi->osc_clk);
|
|
DRM_DEV_ERROR(dev, "failed to get osc_clk: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
hdmi->xclk = devm_clk_get(hdmi->dev, "xclk");
|
|
if (IS_ERR(hdmi->xclk)) {
|
|
ret = PTR_ERR(hdmi->xclk);
|
|
DRM_DEV_ERROR(dev, "failed to get xclk: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = zx_hdmi_ddc_register(hdmi);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(dev, "failed to register ddc: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = zx_hdmi_audio_register(hdmi);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(dev, "failed to register audio: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = zx_hdmi_register(drm, hdmi);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(dev, "failed to register hdmi: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = devm_request_threaded_irq(dev, irq, zx_hdmi_irq_handler,
|
|
zx_hdmi_irq_thread, IRQF_SHARED,
|
|
dev_name(dev), hdmi);
|
|
if (ret) {
|
|
DRM_DEV_ERROR(dev, "failed to request threaded irq: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void zx_hdmi_unbind(struct device *dev, struct device *master,
|
|
void *data)
|
|
{
|
|
struct zx_hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
hdmi->connector.funcs->destroy(&hdmi->connector);
|
|
hdmi->encoder.funcs->destroy(&hdmi->encoder);
|
|
|
|
if (hdmi->audio_pdev)
|
|
platform_device_unregister(hdmi->audio_pdev);
|
|
}
|
|
|
|
static const struct component_ops zx_hdmi_component_ops = {
|
|
.bind = zx_hdmi_bind,
|
|
.unbind = zx_hdmi_unbind,
|
|
};
|
|
|
|
static int zx_hdmi_probe(struct platform_device *pdev)
|
|
{
|
|
return component_add(&pdev->dev, &zx_hdmi_component_ops);
|
|
}
|
|
|
|
static int zx_hdmi_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &zx_hdmi_component_ops);
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id zx_hdmi_of_match[] = {
|
|
{ .compatible = "zte,zx296718-hdmi", },
|
|
{ /* end */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, zx_hdmi_of_match);
|
|
|
|
struct platform_driver zx_hdmi_driver = {
|
|
.probe = zx_hdmi_probe,
|
|
.remove = zx_hdmi_remove,
|
|
.driver = {
|
|
.name = "zx-hdmi",
|
|
.of_match_table = zx_hdmi_of_match,
|
|
},
|
|
};
|