![Shawn Guo](/assets/img/avatar_default.png)
It adds the TV Encoder driver to support video output in PAL and NTSC format. The driver uses syscon/regmap interface to configure register bit sitting in SYSCTRL module for DAC power control. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Sean Paul <seanpaul@chromium.org>
32 lines
872 B
C
32 lines
872 B
C
/*
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* Copyright 2017 Linaro Ltd.
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* Copyright 2017 ZTE Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __ZX_TVENC_REGS_H__
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#define __ZX_TVENC_REGS_H__
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#define VENC_VIDEO_INFO 0x04
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#define VENC_VIDEO_RES 0x08
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#define VENC_FIELD1_PARAM 0x10
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#define VENC_FIELD2_PARAM 0x14
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#define VENC_LINE_O_1 0x18
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#define VENC_LINE_E_1 0x1c
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#define VENC_LINE_O_2 0x20
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#define VENC_LINE_E_2 0x24
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#define VENC_LINE_TIMING_PARAM 0x28
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#define VENC_WEIGHT_VALUE 0x2c
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#define VENC_BLANK_BLACK_LEVEL 0x30
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#define VENC_BURST_LEVEL 0x34
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#define VENC_CONTROL_PARAM 0x3c
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#define VENC_SUB_CARRIER_PHASE1 0x40
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#define VENC_PHASE_LINE_INCR_CVBS 0x48
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#define VENC_ENABLE 0xa8
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#endif /* __ZX_TVENC_REGS_H__ */
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