d4d24c1b4f
This patch prepare the transition to common clk for sama5 dt boards by replacing the timer init callback. Clocks registration cannot be done in early init callback (as formerly done by the old clk implementation) because it requires dynamic allocation which is not ready yet during early init. In the other hand, at91 clocks must be registered before at91sam926x_pit_init is called because PIT (Periodic Interval Timer) driver request the master clk (mck). A new function (at91sama5_dt_timer_init) is created to fullfil these needs. This function registers all at91 clks using the dt definition before calling the PIT init function. The device tree clock registration is enabled only if common clk is selected. Else the old clk registration is been done during at91_dt_initialize call. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
91 lines
2.1 KiB
C
91 lines
2.1 KiB
C
/*
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* Setup code for SAMA5 Evaluation Kits with Device Tree support
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*
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* Copyright (C) 2013 Atmel,
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* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/micrel_phy.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/clk-provider.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include "at91_aic.h"
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#include "generic.h"
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static void __init sama5_dt_timer_init(void)
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{
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#if defined(CONFIG_COMMON_CLK)
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of_clk_init(NULL);
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#endif
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at91sam926x_pit_init();
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}
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static const struct of_device_id irq_of_match[] __initconst = {
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{ .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init },
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{ /*sentinel*/ }
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};
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static void __init at91_dt_init_irq(void)
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{
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of_irq_init(irq_of_match);
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}
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static int ksz9021rn_phy_fixup(struct phy_device *phy)
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{
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int value;
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/* Set delay values */
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value = MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW | 0x8000;
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phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
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value = 0xF2F4;
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phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
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value = MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW | 0x8000;
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phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
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value = 0x2222;
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phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
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return 0;
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}
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static void __init sama5_dt_device_init(void)
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{
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if (of_machine_is_compatible("atmel,sama5d3xcm") &&
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IS_ENABLED(CONFIG_PHYLIB))
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char *sama5_dt_board_compat[] __initdata = {
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"atmel,sama5",
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NULL
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};
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DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
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/* Maintainer: Atmel */
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.init_time = sama5_dt_timer_init,
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.map_io = at91_map_io,
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.handle_irq = at91_aic5_handle_irq,
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.init_early = at91_dt_initialize,
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.init_irq = at91_dt_init_irq,
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.init_machine = sama5_dt_device_init,
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.dt_compat = sama5_dt_board_compat,
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MACHINE_END
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