8330148011
This AT91 specific Kconfig option removed the code that dealt with programmable clocks. Each AT91 SoC embeds programmable clocks and there is little gain to remove this code in case that such a clock is not used. If this option is not selected, it causes certain drivers to fail to build. We simply remove this option instead of adding code just to build a workaround. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
343 lines
8.3 KiB
C
343 lines
8.3 KiB
C
/*
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* arch/arm/mach-at91/pm.c
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* AT91 Power Management
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*
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* Copyright (C) 2005 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/gpio.h>
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#include <linux/suspend.h>
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#include <linux/sched.h>
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#include <linux/proc_fs.h>
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#include <linux/interrupt.h>
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#include <linux/sysfs.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/clk/at91_pmc.h>
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#include <asm/irq.h>
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#include <linux/atomic.h>
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#include <asm/mach/time.h>
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#include <asm/mach/irq.h>
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#include <mach/cpu.h>
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#include "at91_aic.h"
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#include "generic.h"
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#include "pm.h"
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/*
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* Show the reason for the previous system reset.
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*/
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#include "at91_rstc.h"
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#include "at91_shdwc.h"
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static void (*at91_pm_standby)(void);
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static void __init show_reset_status(void)
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{
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static char reset[] __initdata = "reset";
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static char general[] __initdata = "general";
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static char wakeup[] __initdata = "wakeup";
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static char watchdog[] __initdata = "watchdog";
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static char software[] __initdata = "software";
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static char user[] __initdata = "user";
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static char unknown[] __initdata = "unknown";
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static char signal[] __initdata = "signal";
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static char rtc[] __initdata = "rtc";
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static char rtt[] __initdata = "rtt";
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static char restore[] __initdata = "power-restored";
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char *reason, *r2 = reset;
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u32 reset_type, wake_type;
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if (!at91_shdwc_base || !at91_rstc_base)
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return;
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reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
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wake_type = at91_shdwc_read(AT91_SHDW_SR);
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switch (reset_type) {
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case AT91_RSTC_RSTTYP_GENERAL:
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reason = general;
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break;
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case AT91_RSTC_RSTTYP_WAKEUP:
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/* board-specific code enabled the wakeup sources */
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reason = wakeup;
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/* "wakeup signal" */
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if (wake_type & AT91_SHDW_WAKEUP0)
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r2 = signal;
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else {
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r2 = reason;
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if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
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reason = rtt;
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else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
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reason = rtc;
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else if (wake_type == 0) /* power-restored wakeup */
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reason = restore;
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else /* unknown wakeup */
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reason = unknown;
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}
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break;
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case AT91_RSTC_RSTTYP_WATCHDOG:
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reason = watchdog;
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break;
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case AT91_RSTC_RSTTYP_SOFTWARE:
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reason = software;
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break;
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case AT91_RSTC_RSTTYP_USER:
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reason = user;
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break;
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default:
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reason = unknown;
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break;
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}
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pr_info("AT91: Starting after %s %s\n", reason, r2);
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}
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static int at91_pm_valid_state(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_ON:
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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return 1;
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default:
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return 0;
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}
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}
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static suspend_state_t target_state;
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/*
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* Called after processes are frozen, but before we shutdown devices.
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*/
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static int at91_pm_begin(suspend_state_t state)
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{
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target_state = state;
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return 0;
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}
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/*
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* Verify that all the clocks are correct before entering
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* slow-clock mode.
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*/
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static int at91_pm_verify_clocks(void)
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{
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unsigned long scsr;
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int i;
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scsr = at91_pmc_read(AT91_PMC_SCSR);
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/* USB must not be using PLLB */
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if (cpu_is_at91rm9200()) {
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if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
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pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
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return 0;
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}
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} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
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|| cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
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if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
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pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
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return 0;
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}
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}
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/* PCK0..PCK3 must be disabled, or configured to use clk32k */
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for (i = 0; i < 4; i++) {
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u32 css;
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if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
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continue;
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css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
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if (css != AT91_PMC_CSS_SLOW) {
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pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
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return 0;
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}
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}
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return 1;
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}
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/*
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* Call this from platform driver suspend() to see how deeply to suspend.
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* For example, some controllers (like OHCI) need one of the PLL clocks
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* in order to act as a wakeup source, and those are not available when
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* going into slow clock mode.
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*
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* REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
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* the very same problem (but not using at91 main_clk), and it'd be better
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* to add one generic API rather than lots of platform-specific ones.
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*/
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int at91_suspend_entering_slow_clock(void)
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{
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return (target_state == PM_SUSPEND_MEM);
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}
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EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
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static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
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void __iomem *ramc1, int memctrl);
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#ifdef CONFIG_AT91_SLOW_CLOCK
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extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
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void __iomem *ramc1, int memctrl);
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extern u32 at91_slow_clock_sz;
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#endif
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static int at91_pm_enter(suspend_state_t state)
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{
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if (of_have_populated_dt())
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at91_pinctrl_gpio_suspend();
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else
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at91_gpio_suspend();
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at91_irq_suspend();
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pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
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/* remember all the always-wake irqs */
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(at91_pmc_read(AT91_PMC_PCSR)
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| (1 << AT91_ID_FIQ)
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| (1 << AT91_ID_SYS)
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| (at91_get_extern_irq()))
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& at91_aic_read(AT91_AIC_IMR),
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state);
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switch (state) {
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/*
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* Suspend-to-RAM is like STANDBY plus slow clock mode, so
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* drivers must suspend more deeply: only the master clock
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* controller may be using the main oscillator.
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*/
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case PM_SUSPEND_MEM:
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/*
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* Ensure that clocks are in a valid state.
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*/
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if (!at91_pm_verify_clocks())
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goto error;
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/*
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* Enter slow clock mode by switching over to clk32k and
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* turning off the main oscillator; reverse on wakeup.
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*/
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if (slow_clock) {
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int memctrl = AT91_MEMCTRL_SDRAMC;
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if (cpu_is_at91rm9200())
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memctrl = AT91_MEMCTRL_MC;
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else if (cpu_is_at91sam9g45())
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memctrl = AT91_MEMCTRL_DDRSDR;
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#ifdef CONFIG_AT91_SLOW_CLOCK
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/* copy slow_clock handler to SRAM, and call it */
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memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
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#endif
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slow_clock(at91_pmc_base, at91_ramc_base[0],
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at91_ramc_base[1], memctrl);
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break;
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} else {
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pr_info("AT91: PM - no slow clock mode enabled ...\n");
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/* FALLTHROUGH leaving master clock alone */
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}
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/*
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* STANDBY mode has *all* drivers suspended; ignores irqs not
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* marked as 'wakeup' event sources; and reduces DRAM power.
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* But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
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* nothing fancy done with main or cpu clocks.
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*/
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case PM_SUSPEND_STANDBY:
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/*
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* NOTE: the Wait-for-Interrupt instruction needs to be
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* in icache so no SDRAM accesses are needed until the
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* wakeup IRQ occurs and self-refresh is terminated.
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* For ARM 926 based chips, this requirement is weaker
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* as at91sam9 can access a RAM in self-refresh mode.
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*/
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if (at91_pm_standby)
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at91_pm_standby();
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break;
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case PM_SUSPEND_ON:
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cpu_do_idle();
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break;
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default:
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pr_debug("AT91: PM - bogus suspend state %d\n", state);
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goto error;
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}
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pr_debug("AT91: PM - wakeup %08x\n",
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at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
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error:
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target_state = PM_SUSPEND_ON;
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at91_irq_resume();
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if (of_have_populated_dt())
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at91_pinctrl_gpio_resume();
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else
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at91_gpio_resume();
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return 0;
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}
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/*
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* Called right prior to thawing processes.
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*/
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static void at91_pm_end(void)
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{
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target_state = PM_SUSPEND_ON;
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}
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static const struct platform_suspend_ops at91_pm_ops = {
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.valid = at91_pm_valid_state,
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.begin = at91_pm_begin,
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.enter = at91_pm_enter,
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.end = at91_pm_end,
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};
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static struct platform_device at91_cpuidle_device = {
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.name = "cpuidle-at91",
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};
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void at91_pm_set_standby(void (*at91_standby)(void))
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{
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if (at91_standby) {
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at91_cpuidle_device.dev.platform_data = at91_standby;
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at91_pm_standby = at91_standby;
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}
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}
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static int __init at91_pm_init(void)
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{
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#ifdef CONFIG_AT91_SLOW_CLOCK
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slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
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#endif
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pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
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/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
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if (cpu_is_at91rm9200())
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at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
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if (at91_cpuidle_device.dev.platform_data)
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platform_device_register(&at91_cpuidle_device);
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suspend_set_ops(&at91_pm_ops);
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show_reset_status();
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return 0;
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}
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arch_initcall(at91_pm_init);
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