439 lines
12 KiB
C
439 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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*/
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#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
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#include <linux/debugfs.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/kthread.h>
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#include "dpu_core_irq.h"
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#include "dpu_trace.h"
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/**
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* dpu_core_irq_callback_handler - dispatch core interrupts
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* @arg: private data of callback handler
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* @irq_idx: interrupt index
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*/
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static void dpu_core_irq_callback_handler(void *arg, int irq_idx)
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{
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struct dpu_kms *dpu_kms = arg;
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struct dpu_irq *irq_obj = &dpu_kms->irq_obj;
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struct dpu_irq_callback *cb;
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unsigned long irq_flags;
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pr_debug("irq_idx=%d\n", irq_idx);
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if (list_empty(&irq_obj->irq_cb_tbl[irq_idx])) {
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DRM_ERROR("no registered cb, idx:%d enable_count:%d\n", irq_idx,
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atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]));
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}
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atomic_inc(&irq_obj->irq_counts[irq_idx]);
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/*
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* Perform registered function callback
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*/
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spin_lock_irqsave(&dpu_kms->irq_obj.cb_lock, irq_flags);
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list_for_each_entry(cb, &irq_obj->irq_cb_tbl[irq_idx], list)
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if (cb->func)
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cb->func(cb->arg, irq_idx);
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spin_unlock_irqrestore(&dpu_kms->irq_obj.cb_lock, irq_flags);
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/*
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* Clear pending interrupt status in HW.
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* NOTE: dpu_core_irq_callback_handler is protected by top-level
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* spinlock, so it is safe to clear any interrupt status here.
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*/
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dpu_kms->hw_intr->ops.clear_intr_status_nolock(
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dpu_kms->hw_intr,
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irq_idx);
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}
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int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms,
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enum dpu_intr_type intr_type, u32 instance_idx)
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{
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if (!dpu_kms || !dpu_kms->hw_intr ||
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!dpu_kms->hw_intr->ops.irq_idx_lookup)
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return -EINVAL;
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return dpu_kms->hw_intr->ops.irq_idx_lookup(intr_type,
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instance_idx);
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}
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/**
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* _dpu_core_irq_enable - enable core interrupt given by the index
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* @dpu_kms: Pointer to dpu kms context
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* @irq_idx: interrupt index
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*/
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static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx)
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{
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unsigned long irq_flags;
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int ret = 0, enable_count;
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if (!dpu_kms || !dpu_kms->hw_intr ||
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!dpu_kms->irq_obj.enable_counts ||
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!dpu_kms->irq_obj.irq_counts) {
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DPU_ERROR("invalid params\n");
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return -EINVAL;
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}
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if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
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DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
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return -EINVAL;
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}
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enable_count = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]);
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DRM_DEBUG_KMS("irq_idx=%d enable_count=%d\n", irq_idx, enable_count);
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trace_dpu_core_irq_enable_idx(irq_idx, enable_count);
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if (atomic_inc_return(&dpu_kms->irq_obj.enable_counts[irq_idx]) == 1) {
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ret = dpu_kms->hw_intr->ops.enable_irq(
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dpu_kms->hw_intr,
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irq_idx);
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if (ret)
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DPU_ERROR("Fail to enable IRQ for irq_idx:%d\n",
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irq_idx);
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DPU_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret);
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spin_lock_irqsave(&dpu_kms->irq_obj.cb_lock, irq_flags);
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/* empty callback list but interrupt is enabled */
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if (list_empty(&dpu_kms->irq_obj.irq_cb_tbl[irq_idx]))
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DPU_ERROR("irq_idx=%d enabled with no callback\n",
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irq_idx);
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spin_unlock_irqrestore(&dpu_kms->irq_obj.cb_lock, irq_flags);
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}
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return ret;
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}
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int dpu_core_irq_enable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
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{
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int i, ret = 0, counts;
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if (!dpu_kms || !irq_idxs || !irq_count) {
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DPU_ERROR("invalid params\n");
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return -EINVAL;
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}
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counts = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idxs[0]]);
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if (counts)
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DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts);
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for (i = 0; (i < irq_count) && !ret; i++)
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ret = _dpu_core_irq_enable(dpu_kms, irq_idxs[i]);
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return ret;
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}
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/**
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* _dpu_core_irq_disable - disable core interrupt given by the index
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* @dpu_kms: Pointer to dpu kms context
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* @irq_idx: interrupt index
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*/
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static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx)
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{
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int ret = 0, enable_count;
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if (!dpu_kms || !dpu_kms->hw_intr || !dpu_kms->irq_obj.enable_counts) {
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DPU_ERROR("invalid params\n");
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return -EINVAL;
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}
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if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
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DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
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return -EINVAL;
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}
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enable_count = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]);
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DRM_DEBUG_KMS("irq_idx=%d enable_count=%d\n", irq_idx, enable_count);
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trace_dpu_core_irq_disable_idx(irq_idx, enable_count);
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if (atomic_dec_return(&dpu_kms->irq_obj.enable_counts[irq_idx]) == 0) {
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ret = dpu_kms->hw_intr->ops.disable_irq(
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dpu_kms->hw_intr,
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irq_idx);
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if (ret)
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DPU_ERROR("Fail to disable IRQ for irq_idx:%d\n",
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irq_idx);
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DPU_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret);
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}
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return ret;
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}
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int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
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{
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int i, ret = 0, counts;
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if (!dpu_kms || !irq_idxs || !irq_count) {
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DPU_ERROR("invalid params\n");
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return -EINVAL;
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}
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counts = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idxs[0]]);
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if (counts == 2)
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DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts);
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for (i = 0; (i < irq_count) && !ret; i++)
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ret = _dpu_core_irq_disable(dpu_kms, irq_idxs[i]);
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return ret;
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}
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u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
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{
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if (!dpu_kms || !dpu_kms->hw_intr ||
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!dpu_kms->hw_intr->ops.get_interrupt_status)
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return 0;
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if (irq_idx < 0) {
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DPU_ERROR("[%pS] invalid irq_idx=%d\n",
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__builtin_return_address(0), irq_idx);
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return 0;
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}
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return dpu_kms->hw_intr->ops.get_interrupt_status(dpu_kms->hw_intr,
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irq_idx, clear);
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}
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int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms, int irq_idx,
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struct dpu_irq_callback *register_irq_cb)
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{
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unsigned long irq_flags;
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if (!dpu_kms || !dpu_kms->irq_obj.irq_cb_tbl) {
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DPU_ERROR("invalid params\n");
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return -EINVAL;
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}
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if (!register_irq_cb || !register_irq_cb->func) {
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DPU_ERROR("invalid irq_cb:%d func:%d\n",
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register_irq_cb != NULL,
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register_irq_cb ?
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register_irq_cb->func != NULL : -1);
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return -EINVAL;
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}
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if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
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DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
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return -EINVAL;
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}
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DPU_DEBUG("[%pS] irq_idx=%d\n", __builtin_return_address(0), irq_idx);
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spin_lock_irqsave(&dpu_kms->irq_obj.cb_lock, irq_flags);
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trace_dpu_core_irq_register_callback(irq_idx, register_irq_cb);
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list_del_init(®ister_irq_cb->list);
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list_add_tail(®ister_irq_cb->list,
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&dpu_kms->irq_obj.irq_cb_tbl[irq_idx]);
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spin_unlock_irqrestore(&dpu_kms->irq_obj.cb_lock, irq_flags);
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return 0;
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}
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int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms, int irq_idx,
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struct dpu_irq_callback *register_irq_cb)
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{
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unsigned long irq_flags;
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if (!dpu_kms || !dpu_kms->irq_obj.irq_cb_tbl) {
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DPU_ERROR("invalid params\n");
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return -EINVAL;
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}
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if (!register_irq_cb || !register_irq_cb->func) {
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DPU_ERROR("invalid irq_cb:%d func:%d\n",
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register_irq_cb != NULL,
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register_irq_cb ?
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register_irq_cb->func != NULL : -1);
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return -EINVAL;
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}
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if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
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DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
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return -EINVAL;
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}
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DPU_DEBUG("[%pS] irq_idx=%d\n", __builtin_return_address(0), irq_idx);
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spin_lock_irqsave(&dpu_kms->irq_obj.cb_lock, irq_flags);
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trace_dpu_core_irq_unregister_callback(irq_idx, register_irq_cb);
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list_del_init(®ister_irq_cb->list);
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/* empty callback list but interrupt is still enabled */
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if (list_empty(&dpu_kms->irq_obj.irq_cb_tbl[irq_idx]) &&
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atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]))
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DPU_ERROR("irq_idx=%d enabled with no callback\n", irq_idx);
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spin_unlock_irqrestore(&dpu_kms->irq_obj.cb_lock, irq_flags);
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return 0;
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}
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static void dpu_clear_all_irqs(struct dpu_kms *dpu_kms)
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{
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if (!dpu_kms || !dpu_kms->hw_intr ||
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!dpu_kms->hw_intr->ops.clear_all_irqs)
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return;
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dpu_kms->hw_intr->ops.clear_all_irqs(dpu_kms->hw_intr);
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}
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static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
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{
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if (!dpu_kms || !dpu_kms->hw_intr ||
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!dpu_kms->hw_intr->ops.disable_all_irqs)
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return;
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dpu_kms->hw_intr->ops.disable_all_irqs(dpu_kms->hw_intr);
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}
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#ifdef CONFIG_DEBUG_FS
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#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
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static int __prefix ## _open(struct inode *inode, struct file *file) \
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{ \
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return single_open(file, __prefix ## _show, inode->i_private); \
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} \
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static const struct file_operations __prefix ## _fops = { \
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.owner = THIS_MODULE, \
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.open = __prefix ## _open, \
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.release = single_release, \
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.read = seq_read, \
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.llseek = seq_lseek, \
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}
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static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
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{
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struct dpu_irq *irq_obj = s->private;
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struct dpu_irq_callback *cb;
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unsigned long irq_flags;
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int i, irq_count, enable_count, cb_count;
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if (WARN_ON(!irq_obj->enable_counts || !irq_obj->irq_cb_tbl))
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return 0;
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for (i = 0; i < irq_obj->total_irqs; i++) {
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spin_lock_irqsave(&irq_obj->cb_lock, irq_flags);
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cb_count = 0;
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irq_count = atomic_read(&irq_obj->irq_counts[i]);
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enable_count = atomic_read(&irq_obj->enable_counts[i]);
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list_for_each_entry(cb, &irq_obj->irq_cb_tbl[i], list)
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cb_count++;
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spin_unlock_irqrestore(&irq_obj->cb_lock, irq_flags);
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if (irq_count || enable_count || cb_count)
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seq_printf(s, "idx:%d irq:%d enable:%d cb:%d\n",
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i, irq_count, enable_count, cb_count);
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}
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return 0;
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}
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DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_core_irq);
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void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
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struct dentry *parent)
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{
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debugfs_create_file("core_irq", 0600, parent, &dpu_kms->irq_obj,
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&dpu_debugfs_core_irq_fops);
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}
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#endif
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void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms)
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{
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struct msm_drm_private *priv;
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int i;
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if (!dpu_kms->dev) {
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DPU_ERROR("invalid drm device\n");
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return;
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} else if (!dpu_kms->dev->dev_private) {
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DPU_ERROR("invalid device private\n");
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return;
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}
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priv = dpu_kms->dev->dev_private;
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pm_runtime_get_sync(&dpu_kms->pdev->dev);
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dpu_clear_all_irqs(dpu_kms);
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dpu_disable_all_irqs(dpu_kms);
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pm_runtime_put_sync(&dpu_kms->pdev->dev);
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spin_lock_init(&dpu_kms->irq_obj.cb_lock);
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/* Create irq callbacks for all possible irq_idx */
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dpu_kms->irq_obj.total_irqs = dpu_kms->hw_intr->irq_idx_tbl_size;
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dpu_kms->irq_obj.irq_cb_tbl = kcalloc(dpu_kms->irq_obj.total_irqs,
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sizeof(struct list_head), GFP_KERNEL);
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dpu_kms->irq_obj.enable_counts = kcalloc(dpu_kms->irq_obj.total_irqs,
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sizeof(atomic_t), GFP_KERNEL);
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dpu_kms->irq_obj.irq_counts = kcalloc(dpu_kms->irq_obj.total_irqs,
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sizeof(atomic_t), GFP_KERNEL);
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for (i = 0; i < dpu_kms->irq_obj.total_irqs; i++) {
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INIT_LIST_HEAD(&dpu_kms->irq_obj.irq_cb_tbl[i]);
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atomic_set(&dpu_kms->irq_obj.enable_counts[i], 0);
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atomic_set(&dpu_kms->irq_obj.irq_counts[i], 0);
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}
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}
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void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms)
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{
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struct msm_drm_private *priv;
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int i;
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if (!dpu_kms->dev) {
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DPU_ERROR("invalid drm device\n");
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return;
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} else if (!dpu_kms->dev->dev_private) {
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DPU_ERROR("invalid device private\n");
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return;
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}
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priv = dpu_kms->dev->dev_private;
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pm_runtime_get_sync(&dpu_kms->pdev->dev);
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for (i = 0; i < dpu_kms->irq_obj.total_irqs; i++)
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if (atomic_read(&dpu_kms->irq_obj.enable_counts[i]) ||
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!list_empty(&dpu_kms->irq_obj.irq_cb_tbl[i]))
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DPU_ERROR("irq_idx=%d still enabled/registered\n", i);
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dpu_clear_all_irqs(dpu_kms);
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dpu_disable_all_irqs(dpu_kms);
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pm_runtime_put_sync(&dpu_kms->pdev->dev);
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kfree(dpu_kms->irq_obj.irq_cb_tbl);
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kfree(dpu_kms->irq_obj.enable_counts);
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kfree(dpu_kms->irq_obj.irq_counts);
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dpu_kms->irq_obj.irq_cb_tbl = NULL;
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dpu_kms->irq_obj.enable_counts = NULL;
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dpu_kms->irq_obj.irq_counts = NULL;
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dpu_kms->irq_obj.total_irqs = 0;
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}
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irqreturn_t dpu_core_irq(struct dpu_kms *dpu_kms)
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{
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/*
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* Read interrupt status from all sources. Interrupt status are
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* stored within hw_intr.
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* Function will also clear the interrupt status after reading.
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* Individual interrupt status bit will only get stored if it
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* is enabled.
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*/
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dpu_kms->hw_intr->ops.get_interrupt_statuses(dpu_kms->hw_intr);
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/*
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* Dispatch to HW driver to handle interrupt lookup that is being
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* fired. When matching interrupt is located, HW driver will call to
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* dpu_core_irq_callback_handler with the irq_idx from the lookup table.
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* dpu_core_irq_callback_handler will perform the registered function
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* callback, and do the interrupt status clearing once the registered
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* callback is finished.
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*/
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dpu_kms->hw_intr->ops.dispatch_irqs(
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dpu_kms->hw_intr,
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dpu_core_irq_callback_handler,
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dpu_kms);
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return IRQ_HANDLED;
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}
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