ee1a8d402e
These changes from 30 individual branches for the most part update device tree files, but there are also a few source code changes that have crept in this time, usually in order to atomically move over a driver from using hardcoded data to DT probing. A number of platforms change their DT files to use the C preprocessor, which is causing a bit of churn, but that is hopefully only this once. There are a few conflicts with the other branches unfortunately: * in exynos5440.dtsi and kirkwood-6281.dtsi, device nodes are added from multiple branches. Need to be careful to have the right set of closing braces as git gets this one wrong. * In kirkwood.dtsi, one 'ranges' line got split into two lines, while another line got added. Order of the lines does not matter. * in sama5d3.dtsi, some cleanup was merged the wrong way, causing a bogus conflict. We want the 'dmas' and 'dma-names' properties to get added here. * Two lines got removed independently in arch/arm/mach-mxs/mach-mxs.c * Contents get added independently in arch/arm/mach-omap2/cclock33xx_data.c -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUdLnpGCrR//JCVInAQI50RAAsXbH1SGvjKJemXhRkFloPDYpCbgdDUFr ChUbjNV1xsY/jaNCfMa5/Qo7lgz/Ot7BpJef9fZn7ret+dc7nchqe/4iIkAokAUh E4ao9D1dP5aAA0ihdbSQHCZtR/0SUR81h6BoOVuo/1mvEiBaFbWAeYe8/6LJd9II OU1w9bDmjfZWYFUXs+j2VF76ueZQ+kz69XDKZUGtkqN76m1AL8lGDurj5jxvyllF VJns8d9q2nr2q9PferfajK6rkOIPaTpwKblxZHUgobCyOitZaiZM0NgF733TsNM6 HXmhDhkcn7T81+SiHVfigJ/nxo9UgU4zNJCODF3WZIwGIj3FbxvCOpdCYi2NhCO8 oLcgDk57tpoKpB3gvAmYVQHP9FIepFa/WAWyPIADA7PkpYrwgc4v+cLEHXpd8SRv viLLIa5QuNdMeaK+Md9OKmKZFd7uFD9jiMtmdm6IpEVDDjMgoteb2XSoEtNebmtY MfbW4okn118a2dFKKaPTKcXVW/a5FRp2JGfB0A58RQHaJWj3JsY1bFn/xWPEpTOA IWB/HHMln0LYTL2AXN9HcaL1jnGI1Wq5eWBurX+cXQ/ij1A6jfoRKYglx7AQqOHj iWcGYtKLLJCgiWFnLSwcljZhfoYr0/z7rhns6yo7/vhN0riy+M84OgN4HbAmUzc1 Bgy9PnJTNo8= =8PtJ -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "These changes from 30 individual branches for the most part update device tree files, but there are also a few source code changes that have crept in this time, usually in order to atomically move over a driver from using hardcoded data to DT probing. A number of platforms change their DT files to use the C preprocessor, which is causing a bit of churn, but that is hopefully only this once" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits) ARM: at91: dt: rm9200ek: add spi support ARM: at91: dt: rm9200: add spi support ARM: at91/DT: at91sam9n12: add SPI DMA client infos ARM: at91/DT: sama5d3: add SPI DMA client infos ARM: at91/DT: fix SPI compatibility string ARM: Kirkwood: Fix the internal register ranges translation ARM: dts: bcm281xx: change comment to C89 style ARM: mmc: bcm281xx SDHCI driver (dt mods) ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support arm: mvebu: enable mini-PCIe connectors on Armada 370 RD ARM: shmobile: irqpin: add a DT property to enable masking on parent ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ...
146 lines
3.4 KiB
Plaintext
146 lines
3.4 KiB
Plaintext
/ {
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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compatible = "marvell,88f6282-pinctrl";
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reg = <0x10000 0x20>;
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pmx_nand: pmx-nand {
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marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
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"mpp4", "mpp5", "mpp18", "mpp19";
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marvell,function = "nand";
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};
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pmx_sata0: pmx-sata0 {
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marvell,pins = "mpp5", "mpp21", "mpp23";
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marvell,function = "sata0";
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};
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pmx_sata1: pmx-sata1 {
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marvell,pins = "mpp4", "mpp20", "mpp22";
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marvell,function = "sata1";
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};
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pmx_spi: pmx-spi {
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marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
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marvell,function = "spi";
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};
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pmx_twsi0: pmx-twsi0 {
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marvell,pins = "mpp8", "mpp9";
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marvell,function = "twsi0";
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};
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pmx_twsi1: pmx-twsi1 {
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marvell,pins = "mpp36", "mpp37";
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marvell,function = "twsi1";
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};
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pmx_uart0: pmx-uart0 {
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marvell,pins = "mpp10", "mpp11";
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marvell,function = "uart0";
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};
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pmx_uart1: pmx-uart1 {
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marvell,pins = "mpp13", "mpp14";
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marvell,function = "uart1";
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};
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pmx_sdio: pmx-sdio {
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marvell,pins = "mpp12", "mpp13", "mpp14",
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"mpp15", "mpp16", "mpp17";
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marvell,function = "sdio";
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};
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};
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rtc@10300 {
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compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
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reg = <0x10300 0x20>;
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interrupts = <53>;
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clocks = <&gate_clk 7>;
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};
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sata@80000 {
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compatible = "marvell,orion-sata";
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reg = <0x80000 0x5000>;
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interrupts = <21>;
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clocks = <&gate_clk 14>, <&gate_clk 15>;
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clock-names = "0", "1";
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status = "disabled";
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};
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mvsdio@90000 {
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compatible = "marvell,orion-sdio";
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reg = <0x90000 0x200>;
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interrupts = <28>;
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clocks = <&gate_clk 4>;
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bus-width = <4>;
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cap-sdio-irq;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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status = "disabled";
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};
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thermal@10078 {
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compatible = "marvell,kirkwood-thermal";
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reg = <0x10078 0x4>;
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status = "okay";
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};
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i2c@11100 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0x11100 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <32>;
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clock-frequency = <100000>;
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
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0x82000000 0 0x00044000 0x00044000 0 0x00002000 /* Port 1.0 registers */
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0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
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0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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pcie@2,0 {
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device_type = "pci";
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assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 10>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 18>;
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status = "disabled";
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};
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};
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};
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};
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